Chi-Lun Lo

A 1.2V 64fJ/conversion-step continuous-time ΣΔ modulator using asynchronous SAR quantizer and digital ΣΔ truncator

Hung-Chieh Tsai, Chi-Lun Lo, Chen-Yen Ho, 2012, 2012 IEEE Asian Solid State Circuits Conference (A-SSCC).

A 64-fJ/Conv.-Step Continuous-Time $\Sigma \Delta$ Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital $\Delta \Sigma$ Truncator

Hung-Chieh Tsai, Chi-Lun Lo, Yu-Hsin Lin, 2013, IEEE Journal of Solid-State Circuits.

15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensation

Cong Liu, Hung-Chieh Tsai, Chi-Lun Lo, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A GPS/Galileo SoC with adaptive in-band blocker cancellation in 65nm CMOS

Kuan-I Li, Min Chen, Chi-Lun Lo, 2011, 2011 IEEE International Solid-State Circuits Conference.

A Fuel-Efficient Route Plan App Based on Game Theory

Chi-Hua Chen, Hsun-Jung Cho, Chi-Lun Lo, 2017, IoTaaS.

A 23mW, 73dB dynamic range, 80MHz BW continuous-time delta-sigma modulator in 20nm CMOS

Stacy Ho, Zhiyu Ru, Chi-Lun Lo, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

Fuel Consumption Estimation System and Method with Lower Cost

Chi-Hua Chen, Hsun-Jung Cho, Chi-Lun Lo, 2017, Symmetry.

A fuel-efficient route plan method based on game theory

Hsun-Jung Cho, Chi-Lun Lo, Chi-Hua Chen, 2019 .

A 75.1dB SNDR 840MS/s CT ΔΣ modulator with 30MHz bandwidth and 46.4fJ/conv FOM in 55nm CMOS

Hung-Chieh Tsai, Chi-Lun Lo, Chen-Yen Ho, 2013, 2013 Symposium on VLSI Circuits.

A 23 mW, 73 dB Dynamic Range, 80 MHz BW Continuous-Time Delta-Sigma Modulator in 20 nm CMOS

Stacy Ho, Chi-Lun Lo, Jialin Zhao, 2015, IEEE Journal of Solid-State Circuits.

A 4.5 mW CT Self-Coupled $\Delta\Sigma$ Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation

Cong Liu, Hung-Chieh Tsai, Chi-Lun Lo, 2015, IEEE Journal of Solid-State Circuits.