N. Isomura
发表
CDM analysis on 65nm CMOS: Pitfalls when correlating results between IO test chips and product level
T. Suzuki,
K. Hashimoto,
N. Isomura,
2008,
EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.
T. Suzuki,
N. Isomura,
T. Morita,
2007,
2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).