Shyam P. Murarka

发表

Copper interconnection schemes: elimination of the need of diffusion barrier/adhesion promoter by the use of corrosion-resistant low-resistivity-doped copper

Wei Wang, Shyam P. Murarka, Jan M. Neirynck, 1994, Advanced Lithography.

Appendix ‐ Problem Sets

Ronald J. Gutmann, Shyam P. Murarka, Joseph M. Steigerwald, 2007 .

Advanced metallizations in microelectronics : symposium held April 16-20, 1990, San Francisco, California, U.S.A.

Ami Appelbaum, Shyam P. Murarka, Avishay Katz, 1990 .

The effect of the polishing pad treatments on the chemical-mechanical polishing of SiO2 films

Minoru Tomozawa, Shyam P. Murarka, M. Tomozawa, 1995 .

Thickness dependent electrical resistivity of ultrathin (<40 nm) Cu films

Yiping Zhao, Gwo-Ching Wang, Shyam P. Murarka, 2001 .

Chemical Mechanical Planarization of Microelectronic Materials

Ronald J. Gutmann, Shyam P. Murarka, Joseph M. Steigerwald, 1997 .

Silicide thin films and their applications in microelectronics

Shyam P. Murarka, S. Murarka, 1995 .

Damascene copper interconnects with polymer ILDs

Ronald J. Gutmann, Shyam P. Murarka, D. T. Price, 1997 .

Pattern Geometry Effects in the Chemical‐Mechanical Polishing of Inlaid Copper Structures

Ronald J. Gutmann, Shyam P. Murarka, D. T. Price, 1994 .

Self-aligned silicides or metals for very large scale integrated circuit applications

Shyam P. Murarka, S. Murarka, 1986 .

Multilevel interconnections for ULSI and GSI era

Shyam P. Murarka, S. Murarka, 1997 .

Copper/Benzocyclobutene Interconnects for Sub‐100 nm Integrated Circuit Technology: Elimination of High‐Resistivity Metallic Liners and High‐Dielectric Constant Polish Stops

Ronald J. Gutmann, Shyam P. Murarka, Jan M. Neirynck, 1999 .

Chemical processes in the chemical mechanical polishing of copper

Ronald J. Gutmann, David J. Duquette, Shyam P. Murarka, 1995 .

A Study of Stacking Faults during CMOS Processing: Origin, Elimination and Contribution to Leakage

J. M. Dishman, T. E. Seidel, Shyam P. Murarka, 1980 .

Phosphorus out‐diffusion during high temperature anneal of phosphorus‐doped polycrystalline silicon and SiO2

Shyam P. Murarka, S. Murarka, 1984 .

Two‐Dimensional Wafer‐Scale Chemical Mechanical Planarization Models Based on Lubrication Theory and Mass Transport

Donald W. Schwendeman, William N. Gill, Shyam P. Murarka, 1999 .

Basic Science in Silica Glass Polishing

Minoru Tomozawa, Shyam P. Murarka, M. Tomozawa, 1994 .

Alloying of copper for use in microelectronic metallization

Wei Wang, Shyam P. Murarka, William A. Lanford, 1995 .

Capacitance–voltage, current–voltage, and thermal stability of copper alloyed with aluminium or magnesium

Shyam P. Murarka, William A. Lanford, W. Lanford, 1998 .

An investigation of the chemical mechanical polishing of copper thin films to form in-laid interconnections in the dielectric (SiO/sub 2/) films

Ronald J. Gutmann, David J. Duquette, Shyam P. Murarka, 1995, Proceedings of the Eleventh Biennial University/Government/ Industry Microelectronics Symposium.

Thin‐film interaction in aluminum and platinum

Hyman Joseph Levinstein, Shyam P. Murarka, I. Blech, 1976 .

Elastic and viscoelastic analysis of stress in thin films

Shyam P. Murarka, S. Murarka, H. C. Liu, 1992 .

Stability of hydrogen in silicon nitride films deposited by low‐pressure and plasma enhanced chemical vapor deposition techniques

Joseph Z. Xie, Shyam P. Murarka, William A. Lanford, 1989 .

Electrical conduction and breakdown in oxides of polycrystalline silicon and their correlation with interface texture

T. T. Sheng, Shyam P. Murarka, S. Murarka, 1982 .

Integration of copper multilevel interconnects with oxide and polymer interlevel dielectrics

Ronald J. Gutmann, T. Paul Chow, Shyam P. Murarka, 1995 .

Kinetics of platinum silicide formation during rapid thermal processing

A. K. Pant, Shyam P. Murarka, William A. Lanford, 1992 .

Silicide formation in thin cosputtered (tantalum + silicon) films on polycrystalline silicon and SiO2

D. B. Fraser, Shyam P. Murarka, S. Murarka, 1980 .

Oxidation induced stacking faults in n‐ and p‐type (100) silicon

Shyam P. Murarka, S. Murarka, G. Quintana, 1977 .

Electrically active stacking faults in CMOS integrated circuits

J. M. Dishman, R. B. Marcus, Shyam P. Murarka, 1979 .

Copper-Fundamental Mechanisms for Microelectronic Applications

Ronald J. Gutmann, Shyam P. Murarka, R. Gutmann, 2000 .

Chemical Mechanical Planarization—An Introduction

Ronald J. Gutmann, Shyam P. Murarka, Joseph M. Steigerwald, 2007 .

Inlaid Copper Multilevel Interconnections Using Planarization by Chemical-Mechanical Polishing

Ronald J. Gutmann, Shyam P. Murarka, Joseph M. Steigerwald, 1993 .

Stress in silicon dioxide films deposited using chemical vapor deposition techniques and the effect of annealing on these stresses

Bharat Bhushan, Jeff Gerlach, Shyam P. Murarka, 1990 .

Interlayer dielectrics for semiconductor technologies

Ashok K. Sinha, Moshe Eizenberg, Shyam P. Murarka, 2003 .

Resistivities of Thin Film Transition Metal Silicides

D. B. Fraser, Shyam P. Murarka, M. H. Read, 1982 .