Zhonghai Lu

发表

Proceedings of the Third Workshop on Cryptography and Security in Computing Systems

Giovanni Agosta, Gerardo Pelosi, Mats Brorsson, 2016, CS2@HiPEAC.

Composable Worst-Case Delay Bound Analysis Using Network Calculus

Haibin Shen, Zhonghai Lu, Yanchen Long, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A High-Level Thermal Model-Based Task Mapping for CMPs in Dark-Silicon Era

Zhonghai Lu, Jian Wang, Yubai Li, 2016, IEEE Transactions on Electron Devices.

Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

Reducing FPGA Reconfiguration Time Overhead using Virtual Configurations

Axel Jantsch, Zhonghai Lu, Ming Liu, 2010 .

Item-Level Indoor Localization With Passive UHF RFID Based on Tag Interaction Analysis

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2014, IEEE Transactions on Industrial Electronics.

Flit admission in on-chip wormhole-switched networks with virtual channels

Zhonghai Lu, A. Jantsch, 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

Heuristics-Aided Tightness Evaluation of Analytical Bounds in Networks-on-Chip

Zhonghai Lu, Xueqian Zhao, Zhonghai Lu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Aggregate Flow-Based Performance Fairness in CMPs

Yuan Yao, Zhonghai Lu, 2016, ACM Trans. Archit. Code Optim..

FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments

Axel Jantsch, Zhonghai Lu, Ming Liu, 2011, ARC.

Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS

Yuan Yao, Zhonghai Lu, 2017, IEEE Transactions on Computers.

Scalability of network-on-chip communication architecture for 3-D meshes

Axel Jantsch, Hannu Tenhunen, Zhonghai Lu, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

Refinement of a system specification for a digital equalizer into HW and SW implementations

Zhonghai Lu, 2001 .

Optimal Sprinting Pattern in Thermal Constrained CMPs

Zhe Chen, Zhonghai Lu, Jian Wang, 2019 .

A case study of hardware and software synthesis in ForSyDe

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2002, 15th International Symposium on System Synthesis, 2002..

RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory

Meng Zhang, Zhonghai Lu, Jiguang Wan, 2019, IEEE Access.

FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2010, 23rd IEEE International SOC Conference.

Deterministic Worst-Case Performance Analysis for Wireless Sensor Networks

Zhonghai Lu, Li-Rong Zheng, A. Jantsch, 2008, 2008 International Wireless Communications and Mobile Computing Conference.

A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip

Axel Jantsch, Jiang Jiang, Zhonghai Lu, 2011, 2011 IEEE Computer Society Annual Symposium on VLSI.

Dynamic Flow Regulation for IP Integration on Network-on-Chip

Yi Wang, Zhonghai Lu, Yi Wang, 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.

Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2007, 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07).

Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2013, Comput. Electr. Eng..

Efficient Support of AXI4 Transaction Ordering Requirements in Many-Core Architecture

Zhonghai Lu, Boqian Wang, 2020, IEEE Access.

Exploration of Slot Allocation for On-Chip TDM Virtual Circuits

Li Tong, Zhonghai Lu, Hua Zhang, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

System-level exploration of mesh-based NoC architectures for multimedia applications

Ning Ma, Zhonghai Lu, Zhibo Pang, 2010, 23rd IEEE International SOC Conference.

Thread Voting DVFS for Manycore NoCs

Yuan Yao, Zhonghai Lu, 2018, IEEE Transactions on Computers.

ATCA-based computation platform for data acquisition and triggering in particle physics experiments

Axel Jantsch, Qiang Wang, Lu Li, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Real-time analysis for wormhole NoC: Revisited and revised

Fei Wu, Zhonghai Lu, Qin Xiong, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction

Zhonghai Lu, Jiguang Wan, Fei Wu, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Self-selection pseudo- circuit: a clever crossbar pre-allocation

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2012, IEICE Electron. Express.

Refinement of Perfectly Synchronous Communication Model

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2005, FDL.

Advance Virtual Channel Reservation

Zhonghai Lu, Boqian Wang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A flexible configuration approach for fault-tolerant multicast/unicast

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2011, 2011 IEEE 3rd International Conference on Communication Software and Networks.

Analytical approaches for performance evaluation of networks-on-chip

Alan Burns, Axel Jantsch, Zhonghai Lu, 2012, CASES '12.

SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress)

Zhonghai Lu, Yiming Ouyang, Zhenmin Li, 2017, CASES.

Lessons of IOT Effects on Backbone Networks Learnt from Traffic Characteristics

Deshi Li, Zhonghai Lu, Peng Xiao, 2012, 2012 8th International Conference on Wireless Communications, Networking and Mobile Computing.

Worst-case performance analysis of 2-D mesh NoCs using multi-path minimal routing

Zhonghai Lu, Gaoming Du, Minglun Gao, 2012, CODES+ISSS '12.

Smilodon: An Efficient Accelerator for Low Bit-Width CNNs with Task Partitioning

Zhonghai Lu, Li Li, Wenqing Song, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Backlog Bound Analysis for Virtual-Channel Routers

Zhonghai Lu, Xueqian Zhao, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

Efficient distributed memory management in a multi-core H.264 decoder on FPGA

Axel Jantsch, Zhonghai Lu, Jiajie Zhang, 2013, 2013 International Symposium on System on Chip (SoC).

A survey of memory architecture for 3D chip multi-processors

Axel Jantsch, Zhonghai Lu, Feng Han, 2014, Microprocess. Microsystems.

ACO-Based Thermal-Aware Thread-to-Core Mapping for Dark-Silicon-Constrained CMPs

Zhonghai Lu, Jian Wang, Yubai Li, 2017, IEEE Transactions on Electron Devices.

DVFS for NoCs in CMPs: A thread voting approach

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

Multi-FPGA implementation of a Network-on-Chip based many-core architecture with fast barrier synchronization mechanism

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, NORCHIP 2010.

A Reconfigurable Design Framework for FPGA Adaptive Computing

Axel Jantsch, Zhonghai Lu, Shuo Yang, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

TPSS: A Flexible Hardware Support for Unicast and Multicast on Network-on-Chip

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2012, J. Comput..

Characterizing 3D Floating Gate NAND Flash

You Zhou, Zhonghai Lu, Yue Zhu, 2017, SIGMETRICS.

MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2015, J. Syst. Archit..

Area and Performance Optimization of Barrier Synchronization on Multi-core Network-on-Chips

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010 .

Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2012, Int. J. Commun. Syst..

Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Exploiting Minipage-Level Mapping to Improve Write Efficiency of NAND Flash

Fei Wu, Hao Lv, Zhonghai Lu, 2018, 2018 IEEE International Conference on Networking, Architecture and Storage (NAS).

Feasibility analysis of messages for on-chip networks using wormhole routing

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2005, ASP-DAC.

Feasibility analysis of messages for on-chip networks using wormhole routing

Zhonghai Lu, A. Jantsch, I. Sander, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

WARD: Wear Aware RAID Design Within SSDs

Zhonghai Lu, Changsheng Xie, Fei Wu, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An Efficient Hardware Architecture with Adjustable Precision and Extensible Range to Implement Sigmoid and Tanh Functions

Zhonghai Lu, Li Li, Lin Jiang, 2020 .

Applying network calculus for performance analysis of self-similar traffic in on-chip networks

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, CODES+ISSS '09.

A New Parallel CODEC Technique for CDMA NoCs

Zhonghai Lu, Jian Wang, Yubai Li, 2018, IEEE Transactions on Industrial Electronics.

Memory-access aware DVFS for network-on-chip in CMPs

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs

Chunhua Wang, Zhonghai Lu, Miao Li, 2014, 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS).

Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, 23rd IEEE International SOC Conference.

A deadlock-free fault-tolerant routing algorithm based on pseudo-receiving mechanism for Networks-on-Chip of CMP

Zhonghai Lu, Jinwen Li, Yancang Chen, 2011, 2011 International Conference on Multimedia Technology.

Scalability Analysis of Memory Consistency Models in NoC-Based Distributed Shared Memory SoCs

Axel Jantsch, Zhonghai Lu, Abdul Naeem, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Worst-Case Flit and Packet Delay Bounds in Wormhole Networks on Chip

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Extending Real-Time Analysis for Wormhole NoCs

Fei Wu, Zhonghai Lu, Qin Xiong, 2017, IEEE Transactions on Computers.

QoS scheduling for NoCs: Strict Priority Queueing versus Weighted Round Robin

Zhonghai Lu, Qiang Dou, Yue Qian, 2010, 2010 IEEE International Conference on Computer Design.

Multicast Path Setup Incorporating Evicting

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2012 .

Work-in-progress: prediction based convolution neural network acceleration

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, 2017 International Conference on Compilers, Architectures and Synthesis For Embedded Systems (CASES).

Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips

Shuming Chen, Axel Jantsch, Yang Guo, 2015, J. Softw..

Cross clock-domain TDM virtual circuits for networks on chips

Zhonghai Lu, 2011, Proceedings of the Fifth ACM/IEEE International Symposium.

Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications

Fei Wu, You Zhou, Zhonghai Lu, 2018, 2018 IEEE 36th International Conference on Computer Design (ICCD).

SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method

Duoli Zhang, Zhonghai Lu, Yiming Ouyang, 2019, ACM J. Emerg. Technol. Comput. Syst..

Run-Time Partitioning of Hybrid Distributed Shared Memory on Multi-core Network-on-Chips

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, 2010 3rd International Symposium on Parallel Architectures, Algorithms and Programming.

Connection-oriented multicasting in wormhole-switched networks on chip

Axel Jantsch, Zhonghai Lu, Bei Yin, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

Multi-bit transient fault control for NoC links using 2D fault coding method

Zhonghai Lu, Xiaowen Chen, Yaohua Wang, 2016, 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Work-in-progress: SSS: self-aware system-on-chip using static-dynamic hybrid method

Zhonghai Lu, Yiming Ouyang, Zhenmin Li, 2017, 2017 International Conference on Compilers, Architectures and Synthesis For Embedded Systems (CASES).

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions

Li Li, Zhonghai Lu, Hui Chen, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Hybrid Distributed Shared Memory Space in Multi-core Processors

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2011, J. Softw..

Hardware/Software Co-design of a General-Purpose Computation Platform in Particle Physics

Axel Jantsch, Zhonghai Lu, Shuo Yang, 2007, 2007 International Conference on Field-Programmable Technology.

A Fair and Maximal Allocator for Single-Cycle On-Chip Homogeneous Resource Allocation

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Congestion-Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs

Kai Chen, Zhonghai Lu, Li Li, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Analysis of Traffic Splitting Mechanisms for 2D Mesh Sensor Networks

Axel Jantsch, Zhonghai Lu, Li-Rong Zheng, 2008 .

Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip

Axel Jantsch, Zhonghai Lu, Lei Xia, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Slice router: For fine-granularity fault-tolerant Networks-on-Chip

Zhonghai Lu, Jinwen Li, Yancang Chen, 2011, 2011 International Conference on Multimedia Technology.

Power-efficient tree-based multicast support for Networks-on-Chip

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

Program error rate-based wear leveling for NAND flash memory

Fei Wu, Zhonghai Lu, Changsheng Xie, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

ANN Based Admission Control for On-Chip Networks

Zhonghai Lu, Shenggang Chen, Boqian Wang, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Characterizing 3D Floating Gate NAND Flash

Fei Wu, Zhonghai Lu, Qin Xiong, 2018, SIGMETRICS.

Stochastic coverage in event-driven sensor networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2011, 2011 IEEE 22nd International Symposium on Personal, Indoor and Mobile Radio Communications.

COSMO: CO-Simulation with MATLAB and OMNeT++ for Indoor Wireless Networks

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2010, 2010 IEEE Global Telecommunications Conference GLOBECOM 2010.

Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).

A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2010, NoCArc '10.

Cooperative communication based barrier synchronization in on-chip mesh architectures

Shuming Chen, Hai Liu, Axel Jantsch, 2011, IEICE Electron. Express.

A flow regulator for On-Chip Communication

Axel Jantsch, Zhonghai Lu, Dimitris Brachos, 2009, 2009 IEEE International SOC Conference (SOCC).

2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Copenhagen, Denmark, 9-11 May, 2012

Natalie D. Enright Jerger, Hannu Tenhunen, Meikang Qiu, 2012, NOCS.

FPGA-based adaptive computing for correlated multi-stream processing

Axel Jantsch, Zhonghai Lu, Ming Liu, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Applying network calculus for worst-case delay bound analysis in on-chip networks

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era.

3-D memory organization and performance analysis for multi-processor network-on-chip architecture

Hannu Tenhunen, Zhonghai Lu, Roshan Weerasekera, 2009, 2009 IEEE International Conference on 3D System Integration.

Per-flow delay bound analysis based on a formalized microarchitectural model

Zhonghai Lu, Xueqian Zhao, 2013, 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS).

Analysis of Worst-Case Delay Bounds for On-Chip Packet-Switching Networks

Wenhua Dou, Zhonghai Lu, Yue Qian, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Mathematical formalisms for performance evaluation of networks-on-chip

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2013, CSUR.

A framework for designing congestion-aware deterministic routing

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2010, NoCArc '10.

Customizable coarse-grained energy-efficient reconfigurable packet processing architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2014, 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors.

Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems

Giovanni Agosta, Gerardo Pelosi, Mats Brorsson, 2017, CS2@HiPEAC.

Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications

Shuming Chen, Axel Jantsch, Yang Guo, 2015, J. Electr. Comput. Eng..

Scalability of weak consistency in NoC based multicore architectures

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Design and implementation of multi-mode routers for large-scale inter-core networks

Ning Ma, Zhonghai Lu, Li-Rong Zheng, 2016, Integr..

SCORE

Fei Wu, You Zhou, Zhonghai Lu, 2018, ACM Transactions on Architecture and Code Optimization.

Traffic configuration for evaluating networks on chips

Axel Jantsch, Zhonghai Lu, 2005, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05).

Pursuing Extreme Power Efficiency With PPCC Guided NoC DVFS

Zhonghai Lu, Yuan Yao, 2020, IEEE Transactions on Computers.

Empowering study of delay bound tightness with simulated annealing

Zhonghai Lu, Xueqian Zhao, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

From 2D to 3D NoCs: A case study on worst-case communication performance

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments

Axel Jantsch, Qiang Wang, Hao Xu, 2011, Computing in Science & Engineering.

Modeling and Power Evaluation of On-Chip Router Components in Spintronics

Meikang Qiu, Xianyang Jiang, Zhonghai Lu, 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.

Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh

Axel Jantsch, Zhonghai Lu, Roshan Weerasekera, 2009, 2009 IEEE International Conference on 3D System Integration.

A Model-Based Approach to Dynamic Self-assessment for Automated Performance and Safety Awareness of Cyber-Physical Systems

Zhonghai Lu, De-Jiu Chen, Zhonghai Lu, 2017, IMBSA.

RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router

Zhonghai Lu, Xiangke Liao, Dezun Dong, 2018, IEEE Transactions on Parallel and Distributed Systems.

Cache Access Fairness in 3D Mesh-Based NUCA

Zhonghai Lu, Xiaowen Chen, Yang Guo, 2018, IEEE Access.

NNSE: Nostrum Network-on-Chip Simulation Environment

Axel Jantsch, Zhonghai Lu, Mikael Millberg, 2005 .

A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2012, IEICE Trans. Inf. Syst..

Definition of Device Level Interface with QoS : Draft Specification

Axel Jantsch, Zhonghai Lu, Mikael Millberg, 2007 .

Network-on-Chip Assembler Language

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2003 .

Towards stochastic delay bound analysis for Network-on-Chip

Yuan Yao, Zhonghai Lu, Yuming Jiang, 2014, 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS).

Design and Optimization of a CDMA-Based Multi-Reader Passive UHF RFID System for Dense Scenarios

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2012, IEICE Trans. Commun..

An Analytical Latency Model for Networks-on-Chip

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fuzzy flow regulation for Network-on-Chip based chip multiprocessors systems

Yuan Yao, Zhonghai Lu, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs

Yang Li, Shuming Chen, Axel Jantsch, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

Parallel probe based dynamic connection setup in TDM NoCs

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash

Zhonghai Lu, Changsheng Xie, Yifei Wang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

OLITS: An Ohm's Law-like traffic splitting model based on congestion prediction

Zhonghai Lu, Xiangyang Li, Ping Song, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Refining synchronous communication onto network-on-chip best-effort services

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2006 .

Optimal regulation of traffic flows in networks-on-chip

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Speedup analysis of data-parallel applications on Multi-core NoCs

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2009, 2009 IEEE 8th International Conference on ASIC.

Trigger algorithm development on FPGA-based Compute Nodes

Lu Li, Zhonghai Lu, Dapeng Jin, 2009, 2009 16th IEEE-NPSS Real Time Conference.

Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing

Axel Jantsch, Zhonghai Lu, Ming Liu, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments

Axel Jantsch, Zhonghai Lu, Ming Liu, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Lifetime adaptive ECC in NAND flash page management

Fei Wu, Meng Zhang, Zhonghai Lu, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Analyzing Credit-Based Router-to-Router Flow Control for On-Chip Networks

Wenhua Dou, Zhonghai Lu, Qiang Dou, 2009, IEICE Trans. Electron..

Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs

Shuming Chen, Axel Jantsch, Yang Guo, 2014, IEICE Electron. Express.

Architecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems

Axel Jantsch, Zhonghai Lu, Abdul Naeem, 2012, 2012 15th Euromicro Conference on Digital System Design.

Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls

Zhonghai Lu, Gaoming Du, Xueqian Zhao, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

Axel Jantsch, Zhonghai Lu, Ming Liu, 2012, Int. J. Embed. Real Time Commun. Syst..

Hardware/software co-design of an ATCA-based computation platform for data acquisition and triggering

Lu Li, Zhonghai Lu, Qiang Wang, 2009, 2009 16th IEEE-NPSS Real Time Conference.

A single-cycle output buffered router with layered switching for Networks-on-Chips

Zhonghai Lu, Minxuan Zhang, Jinwen Li, 2012, Comput. Electr. Eng..

A Trace-driven Hardware-level Simulator for Design and Verification of Network-on-Chips

Zhonghai Lu, Xiaowen Chen, Yancang Chen, 2010 .

Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2009, VTC Spring 2009 - IEEE 69th Vehicular Technology Conference.

A case study of hardware and software synthesis in ForSyDe

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2002, 15th International Symposium on System Synthesis, 2002..

Towards QoS-Aware Service-Oriented Communication in E/E Automotive Architectures

Zhonghai Lu, De-Jiu Chen, Matthias Becker, 2018, IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society.

A Tool for xMAS-Based Modeling and Analysis of Communication Fabrics in Simulink

Zhonghai Lu, Xueqian Zhao, 2017, ACM Trans. Model. Comput. Simul..

Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2012, Int. J. Distributed Sens. Networks.

OCP-IP Network-on-chip benchmarking workgroup

Zhonghai Lu, Erno Salminen, 2011 .

Security-Aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs

Zhonghai Lu, Jinhong Guo, Shize Guo, 2019, IEEE Transactions on Industrial Informatics.

A 101.4 GOPS/W Reconfigurable and Scalable Control-Centric Embedded Processor for Domain-Specific Applications

Ning Ma, Zhonghai Lu, Li-Rong Zheng, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

Trends of terascale computing Chips in the next ten years

Axel Jantsch, Zhonghai Lu, 2009, 2009 IEEE 8th International Conference on ASIC.

Service-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2016, 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP).

Analysis and evaluation of per-flow delay bound for multiplexing models

Zhonghai Lu, Xiaolang Yan, Yanchen Long, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Evaluation of deflection routing on various NoC topologies

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2011, 2011 9th IEEE International Conference on ASIC.

Design and Analysis of On-Chip Communication for Network-on-Chip Platforms

Zhonghai Lu, Zhonghai Lu, 2007 .

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization

Zhonghai Lu, Shenggang Chen, Zhonghai Lu, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Traffic Splitting with Network Calculus for Mesh Sensor Networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2007, Future Generation Communication and Networking (FGCN 2007).

Using wormhole switching for networks on chip : feasibility analysis and microarchitecture adaptation

Zhonghai Lu, Zhonghai Lu, 2005 .

Analysis of communication delay bounds for network on chips

Wenhua Dou, Zhonghai Lu, Yue Qian, 2009, 2009 Asia and South Pacific Design Automation Conference.

Jamming-resilient multi-radio multi-channel multihop wireless network for smart grid

Meikang Qiu, Hai Su, Xiao Qin, 2011, CSIIRW '11.

Analysis and Evaluation of Circuit Switched NoC and Packet Switched NoC

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2013, 2013 Euromicro Conference on Digital System Design.

A power efficient flit-admission scheme for wormhole-switched networks on chip

Axel Jantsch, Zhonghai Lu, Bei Yin, 2005 .

A Universal Approximation Method and Optimized Hardware Architectures for Arithmetic Functions Based on Stochastic Computing

Zhongfeng Wang, Zhonghai Lu, Yuou Qiu, 2020, IEEE Access.

Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors

Meikang Qiu, Bin Wang, Zhonghai Lu, 2012, J. Syst. Archit..

A New CDMA Encoding/Decoding Method for on-Chip Communication Network

Zhonghai Lu, Yubai Li, Jian Wang, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Admitting and ejecting flits in wormhole-switched networks on chip

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2007, IET Comput. Digit. Tech..

Bit-Flipping Schemes Upon MLC Flash: Investigation, Implementation, and Evaluation

Zhonghai Lu, Qiang Cao, Wenhui Zhang, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Dynamic Traffic Regulation in NoC-Based Systems

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Memory Architecture and Management in an NoC Platform

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2012 .

Layered Switching for Networks on Chip

Axel Jantsch, Zhonghai Lu, Ming Liu, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Flow regulation for on-chip communication

Axel Jantsch, Zhonghai Lu, Mikael Millberg, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

ALARM: A Location-Aware Redistribution Method to Improve 3D FG NAND Flash Reliability

Fei Wu, Zhonghai Lu, Qin Xiong, 2017, 2017 International Conference on Networking, Architecture, and Storage (NAS).

TDM Virtual-Circuit Configuration for Network-on-Chip

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2015, TODE.

Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis

Zhonghai Lu, Xiaolang Yan, Li-Rong Zheng, 2013, Int. J. Commun. Syst..

System design of full HD MVC decoding on mesh-based multicore NoCs

Zhonghai Lu, Ning Ma, Lirong Zheng, 2011, Microprocess. Microsystems.

The MOSART Mapping Optimization for Multi-Core ARchiTectures

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, ISVLSI.

Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2017, Microprocess. Microsystems.

Evaluation of on-chip networks using deflection routing

Axel Jantsch, Zhonghai Lu, Mingchen Zhong, 2006, GLSVLSI '06.

An Enhanced IOT Gateway in a Broadcast System

Deshi Li, Xianyang Jiang, Zhonghai Lu, 2012, 2012 9th International Conference on Ubiquitous Intelligence and Computing and 9th International Conference on Autonomic and Trusted Computing.

Exploring stacked main memory architecture for 3D GPGPUs

Li Li, Axel Jantsch, Zhonghai Lu, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

xMAS-Based QoS Analysis Methodology

Zhonghai Lu, Xueqian Zhao, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2012, IEICE Trans. Inf. Syst..

Parallel probing: Dynamic and constant time setup procedure in circuit switching NoC

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Adaptively Reconfigurable Controller for the Flash Memory

Axel Jantsch, Zhonghai Lu, Ming Liu, 2011 .

Buffer Optimization in Network-on-Chip Through Flow Regulation

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Prediction based convolution neural network acceleration: work-in-progress

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, CASES.

A 2-mW Multi-mode Router Design with Dual-core Processor in 65 nm LL CMOS for Inter-silicon Communication

Zhonghai Lu, Li-Rong Zheng, Ning Ma, 2015 .

Towards hierarchical cluster based cache coherence for large-scale network-on-chip

Zhonghai Lu, Li Li, Minglun Gao, 2009, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era.

Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2014 .

Modeling and analysis of Rayleigh fading channels using stochastic network calculus

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2011, 2011 IEEE Wireless Communications and Networking Conference.

Network-on-Chip multicasting with low latency path setup

Axel Jantsch, Zhonghai Lu, Hengzhu Liu, 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.

Implementing MVC Decoding on Homogeneous NoCs: Circuit Switching or Wormhole Switching

Ning Ma, Zhonghai Lu, Li-Rong Zheng, 2015, 2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing.

Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip

Axel Jantsch, Zhonghai Lu, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Network-on-Chip Benchmarking Specification Part 2: Micro-Benchmark Specification Version 1.0

Zhonghai Lu, Erno Salminen, C. Grecu, 2008 .

A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition

Shuming Chen, Zhonghai Lu, Xiaowen Chen, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Weighted Round Robin Configuration for Worst-Case Delay Optimization in Network-on-Chip

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Scalability analysis of release and sequential consistency models in NoC based multicore systems

Axel Jantsch, Zhonghai Lu, Abdul Naeem, 2012, 2012 International Symposium on System on Chip (SoC).

Dynamic TDM virtual circuit implementation for NoC

Yu Wang, Huazhong Yang, Zhonghai Lu, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator

Zhonghai Lu, Zhenmin Li, Duoli Zhang, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Development and application of design transformations in ForSyDe [high level synthesis]

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips

Axel Jantsch, Zhonghai Lu, Yuxiang Fu, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2011, 2011 14th Euromicro Conference on Digital System Design.

Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations

Axel Jantsch, Iraklis Anagnostopoulos, Zhonghai Lu, 2011, IEEE Embedded Systems Letters.

A hierarchical reconfigurable micro-coded multi-core processor for IoT applications

Ning Ma, Zhonghai Lu, Li-Rong Zheng, 2014, 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Run-time Partial Reconfiguration speed investigation and architectural design space exploration

Axel Jantsch, Zhonghai Lu, Ming Liu, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Refinement of A Perfectly Synchronous Communication Model onto Nostrum NoC Best-Effort Communication Service

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2005 .

Round-trip DRAM Access Fairness in 3D NoC-based Many-core Systems

Shuming Chen, Sheng Liu, Zhonghai Lu, 2017, ACM Trans. Embed. Comput. Syst..

Resource Allocation for QoS On-Chip Communication

Axel Jantsch, Zhonghai Lu, 2009, NOCS 2009.

Advance Virtual Channel Reservation

Zhonghai Lu, Boqian Wang, 2020, IEEE Transactions on Computers.

System-level evaluation of sensor networks deployment strategies: Coverage, lifetime and cost

Axel Jantsch, Zhonghai Lu, Huimin She, 2012, 2012 8th International Wireless Communications and Mobile Computing Conference (IWCMC).

A Low Delay Multiple Reader Passive RFID System Using Orthogonal TH-PPM IR-UWB

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2010, 2010 Proceedings of 19th International Conference on Computer Communications and Networks.

Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation

Zhonghai Lu, Li Li, Hui Chen, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores

Yuan Yao, Zhonghai Lu, Y. Yao, 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Scalability of relaxed consistency models in NoC based multicore architectures

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2010, CARN.

Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs

Yuan Yao, Zhonghai Lu, 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).

Performance analysis of on-chip bufferless router with multi-ejection ports

Axel Jantsch, Zhonghai Lu, Zhenyu Zhao, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Flexible and Efficient QoS Provisioning in AXI4-based Network-on-Chip Architecture

Zhonghai Lu, Boqian Wang, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A General Methodology and Architecture for Arbitrary Complex Number Nth Root Computation

Zhonghai Lu, Yuxiang Fu, Li Li, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Dynamic and Traffic-Aware Medium Access Control Mechanisms for Wireless NoC Architectures

Zhonghai Lu, Wenqing Song, Yuxiang Fu, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Evaluation of Time Series Clustering on Embedded Sensor Platform

Zhonghai Lu, Wenyao Zhu, Zhonghai Lu, 2021, 2021 24th Euromicro Conference on Digital System Design (DSD).

A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash

Zhonghai Lu, Lanlan Cui, Fei Wu, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions

Zhonghai Lu, Wenqing Song, Yuxiang Fu, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory

Yu Wang, Zhonghai Lu, Fei Wu, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Configurable Hardware Architecture for Runtime Application of Network Calculus

Zhonghai Lu, Xiao Hu, Zhonghai Lu, 2021, NPC.

The Impact of Faults on DNNs: A Case Study

Zhonghai Lu, Masoumeh Ebrahimi, Nezam Rohbani, 2021, 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers

Zhonghai Lu, Yuxiang Fu, Li Li, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Guest Editorial: IEEE TC Special Issue On Communications for Many-core Processors and Accelerators

Zhonghai Lu, 2021, IEEE Trans. Computers.

Nostrum Network-on-Chip Simulation Environment

Axel Jantsch, Zhonghai Lu, Mikael Millberg, 2005 .

Estimation of Statistical Bandwidth through Backlog Measurement

Axel Jantsch, Zhonghai Lu, Huimin She, 2012 .

Highway in TDM NoCs

Axel Jantsch, Zhonghai Lu, Shaoteng Liu, 2015, NOCS.