Haidar M. Harmanani

发表

An evolutionary algorithm for the testable allocation problem in high-level synthesis

Haidar M. Harmanani, Rony Saliba, H. Harmanani, 2002, 9th International Conference on Electronics, Circuits and Systems.

An all-digital fast tracking switching converter with a programmable order loop controller for envelope tracking RF power amplifiers

Rony Ferzli, Haidar M. Harmanani, Nijad Anabtawi, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Power-constrained system-on-a-chip test scheduling using a genetic algorithm

Haidar M. Harmanani, Hassan A. Salamy, 2005, The 3rd International IEEE-NEWCAS Conference, 2005..

Cloud federation formation using genetic and evolutionary game theoretical models

Omar Abdel Wahab, Azzam Mourad, Haidar M. Harmanani, 2020, Future Gener. Comput. Syst..

Heuristic approaches for optimizing the performance of rule-based classifiers

Danielle Azar, Haidar M. Harmanani, 2011, 2011 IEEE International Conference on Information Reuse & Integration.

An enhanced light-load efficiency step down regulator with fine step frequency scaling

Rony Ferzli, Haidar M. Harmanani, Nijad Anabtawi, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Test insertion at the RT level using functional test metrics

Haidar M. Harmanani, Salam Harfoush, 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).

A Strength Pareto Evolutionary Algorithm for Optimizing System-On-Chip Test Schedules

Haidar M. Harmanani, Rana Farah, Wissam Marrouche, 2018, Int. J. Comput. Intell. Appl..

Estimating test cost during data path and controller synthesis with low power overhead

Haidar M. Harmanani, Maya Kodeih, H. Harmanani, 2010, CCECE 2010.

A hybrid heuristic approach to optimize rule-based software quality estimation models

Danielle Azar, Haidar M. Harmanani, Rita Korkmaz, 2009, Inf. Softw. Technol..

An Evolutionary Algorithm for the Allocation Problem in High-level Synthesis

Haidar M. Harmanani, Rony Saliba, H. Harmanani, 2005, J. Circuits Syst. Comput..

Genetic Algorithm for Solving Site Layout Problem with Unequal-Size and Constrained Facilities

Haidar M. Harmanani, Pierrette P. Zouein, A. Hajar, 2002 .

Efficient Shaped Quantizer Dithering Implementation for

Rony Ferzli, Haidar M. Harmanani, Nijad Anabtawi, 2014 .

An Ant Colony Optimization Heuristic to Optimize Prediction of Stability of Object-Oriented Components

Danielle Azar, Haidar M. Harmanani, Grace Zgheib, 2015, 2015 IEEE International Conference on Information Reuse and Integration.

A Simulated Annealing Algorithm for the Capacitated Vehicle Routing Problem

Danielle Azar, Haidar M. Harmanani, Nathalie Helal, 2011, CATA.

A Parallel Genetic Algorithm For The Geometrically Constrained Site Layout Problem With Unequal-Size Facilities

Haidar M. Harmanani, Pierrette P. Zouein, Pierrette Zouein, 2004, Int. J. Comput. Intell. Appl..

A Simulated Annealing Algorithm for System-on-Chip Test Scheduling with, Power and Precedence Constraints

Haidar M. Harmanani, Hassan A. Salamy, 2006, Int. J. Comput. Intell. Appl..

Efficient shaped quantizer dithering implementation for sigma delta modulators

Haidar M. Harmanani, Nijad Anabtawi, Rony Ferzli, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A neural networks algorithm for data path synthesis

Haidar M. Harmanani, H. Harmanani, 2003, Comput. Electr. Eng..

Resource allocation and reallocation techniques in high-level synthesis with testability constraints

Haidar M. Harmanani, 1994 .

An optimal formulation for test scheduling network-on-chip using multiple clock rates

Haidar M. Harmanani, Hassan A. Salamy, 2011, 2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE).

A Rule-Based Extensible Stemmer for Information Retrieval with Application to Arabic

Haidar M. Harmanani, Walid Keirouz, Saeed Raheel, 2006, Int. Arab J. Inf. Technol..

A parallel genetic algorithm for the open-shop scheduling problem using deterministic and random moves

Haidar M. Harmanani, Steve Bou Ghosn, Fouad Drouby, 2009, SpringSim '09.

A Parallel Neural Networks Algorithm for the Clique Partitioning Problem

Haidar M. Harmanani, 2002, Int. J. Comput. Their Appl..

A Smart Green House Control and Management System Using IoT

Haidar M. Harmanani, Abdallah Chamra, 2020 .

Heuristic Approaches for the Open-Shop Scheduling Problem

Haidar M. Harmanani, Wissam Marrouche, H. Harmanani, 2018 .

An evolutionary approach for data path synthesis

Haidar M. Harmanani, R. Saliba, 2000, 2000 Canadian Conference on Electrical and Computer Engineering. Conference Proceedings. Navigating to a New Era (Cat. No.00TH8492).

A parallel genetic algorithm for the geometrically constrained site layout problem

Haidar M. Harmanani, Pierrette P. Zouein, A. Hajar, 2018 .

An Efficient Method for the Open-Shop Scheduling Problem Using Simulated Annealing

Haidar M. Harmanani, Steve Bou Ghosn, Steve Bou ghosn, 2016 .

Power-constrained system-on-a-chip test scheduling using a genetic algorithm

Haidar M. Harmanani, Hassan Salamy, 2005 .

A Novel Federated Fog Architecture Embedding Intelligent Formation

Ahmad Hammoud, Azzam Mourad, Zbigniew Dziong, 2020, IEEE Network.

A Multiobjective Optimization Method for the SOC Test Time, TAM, and Power Optimization Using a Strength Pareto Evolutionary Algorithm

Haidar M. Harmanani, Rana Farah, Wissam Marrouche, 2018 .

An approach for redesign for testability at the register-transfer level

Haidar M. Harmanani, Salam Harfoush, 2000 .

A method for redesign for testability at the RT level

Haidar M. Harmanani, Salam Harfoush, 1998, Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341).

Thermal-aware test scheduling using network-on-chip under multiple clock rates

Haidar M. Harmanani, Hassan Salamy, 2013 .

A single switcher combined series parallel hybrid envelope tracking amplifier for wideband RF power amplifier applications

Rony Ferzli, Haidar M. Harmanani, Nijad Anabtawi, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

An outcome-based assessment process for accrediting computing programmes

Haidar M. Harmanani, H. Harmanani, 2017 .

Effective solutions for the split delivery vehicle routing problem with time windows

Haidar M. Harmanani, Nathalie Helal, 2017 .

A Bottom-Up Outcome-Based Learning Assessment Process for Accrediting Computing Programs

Haidar M. Harmanani, H. Harmanani, 2012 .