Roberto Vietti

Fast sequential circuit test generation using high-level and gate-level techniques

Elizabeth M. Rudnick, Paolo Prinetto, Matteo Sonza Reorda, 1998, Proceedings Design, Automation and Test in Europe.

Enhancing topological ATPG with high-level information and symbolic techniques

Elizabeth M. Rudnick, Janak H. Patel, Matteo Sonza Reorda, 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

A system for evaluating on-line testability at the RT-level

Silvia Chiusano, Matteo Sonza Reorda, Fulvio Corno, 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).