Stephen J. Schwinn

Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading

Xin Wang, Zhiyuan Li, David J. Lilja, 1998, J. Inf. Sci. Eng..

Fine-grained power managed dual-thread vector scalar unit for the first-generation CELL processor

Sue Cox, Christophe Tretz, Jente B. Kuang, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

High-level information-an approach for integrating front-end and back-end compilers

Xin Wang, Qing Zhao, Zhiyuan Li, 1998, Proceedings. 1998 International Conference on Parallel Processing (Cat. No.98EX205).