Luís Guerra e Silva

Library Compatible Variational Delay Computation

Zhenhai Zhu, Joel R. Phillips, Luis Miguel Silveira, 2006, VLSI-SoC.

Handling intra-die variations in PSTA

Luís Miguel Silveira, Luís Guerra e Silva, 2011, GLSVLSI '11.

Satisfiability models and algorithms for circuit delay computation

Joao Marques-Silva, Luís Miguel Silveira, Karem A. Sakallah, 2002, TODE.

TAU 2013 variation aware timing analysis contest

Jia Wang, Ahmed Shebaita, Luís Guerra e Silva, 2013, ISPD '13.

Efficient Computation of the Worst-Delay Corner

Luís Miguel Silveira, Joel R. Phillips, Luís Guerra e Silva, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Effective Corner-Based Techniques for Variation-Aware IC Timing Verification

Luís Miguel Silveira, Joel R. Phillips, Luís Guerra e Silva, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Algorithms for solving Boolean satisfiability in combinational circuits

Joao Marques-Silva, Luís Miguel Silveira, Luís Guerra e Silva, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Solving satisfiability in combinational circuits

Joao Marques-Silva, Luís Guerra e Silva, Joao Marques-Silva, 2003, IEEE Design & Test of Computers.

Unifying functional and parametric timing verification

Luís Guerra e Silva, 2012, ACM Great Lakes Symposium on VLSI.

Speedpath analysis under parametric timing models

Joel R. Phillips, Luis Miguel Silveira, Luís Guerra e Silva, 2010, Design Automation Conference.

Grid-based statistical timing analysis

Luís Miguel Silveira, Luís Guerra e Silva, 2005, IADIS AC.

Variation-Aware, Library Compatible Delay Modeling Strategy

Zhenhai Zhu, Joel R. Phillips, Luis Miguel Silveira, 2006, 2006 IFIP International Conference on Very Large Scale Integration.