A. Madisetti

DCT/IDCT processor design for HDTV applications

A. Madisetti, A. N. Willson, A. Willson, 1995, Proceedings of ISSE'95 - International Symposium on Signals, Systems and Electronics.

A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range

A. Y. Kwentus, Alan N. Willson, A. Madisetti, 1999 .

An 80 k-transistor configurable 25 MPixels/s video compression processor unit

R. Jain, A. Madisetti, S. Molloy, 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

Architectures and integrated circuits for real time vector quantization of images

R. Jain, A. Madisetti, Richard L. Baker, 1992, [Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing.

A 3.125Gbps timing and data recovery front-end with adaptive equalization

Hui Wang, A. Madisetti, H. Baumer, 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).