Suk-Kang Sung

A highly manufacturable integration technology for 27nm 2 and 3bit/cell NAND flash memory

Sejun Park, Jeong-Hyuk Choi, Kang-Deog Suh, 2010, 2010 International Electron Devices Meeting.

Hf-silicate inter-poly dielectric technology for sub 70nm body tied FinFET flash memory

Donggun Park, Byung-Il Ryu, Yonghan Roh, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Dynamic exclusive-OR gate based on gate-induced Si island single-electron transistor

Byung-Gook Park, Jong Duk Lee, Dae Hwan Kim, 2002 .

Nanoscale Multi-Line Patterning Using Sidewall Structure

Byung-Gook Park, Jong Duk Lee, Dae Hwan Kim, 2002 .

Hot carrier generation and reliability of BT(body-tied)-Fin type SRAM cell transistors (W/sub fin/=20/spl sim/70 nm)

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

Single-electron transistors based on gate-induced Si island for single-electron logic application

Byung-Gook Park, Jong Duk Lee, Dae Hwan Kim, 2002 .

SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory

Seung Beom Kim, Donggun Park, Byung-Il Ryu, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Gate-all-around single silicon nanowire MOSFET with 7 nm width for SONOS NAND flash memory

Donggun Park, Jun Seo, Keun Hwi Cho, 2008, 2008 Symposium on VLSI Technology.

Ultra fine multi-line patterning based on sidewall patterning technique

Byung-Gook Park, Jong Duk Lee, Suk-Kang Sung, 2001, Digest of Papers. Microprocesses and Nanotechnology 2001. 2001 International Microprocesses and Nanotechnology Conference (IEEE Cat. No.01EX468).

Fully integrated SONOS flash memory cell array with BT (body tied)-FinFET structure

Chang Woo Oh, Donggun Park, Eun Suk Cho, 2006 .

Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire

Byung-Gook Park, Jong Duk Lee, Dae Hwan Kim, 2002 .

Si single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic

Byung-Gook Park, Jong Duk Lee, Doyeol Ahn, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method

Doyeol Ahn, J. D. Lee, Suk-Kang Sung, 2001 .

Trap Layer Engineered FinFET NAND Flash with Enhanced Memory Window

Seung Beom Kim, Donggun Park, Byung-Il Ryu, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..