Chi-Tung Ko

Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications

Kong-Pang Pun, Lei Sun, Chi-Tung Ko, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator.

Kong-Pang Pun, Chi-Tung Ko, 2007 .

A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT ΔΣ Modulator

Kong-Pang Pun, Chi-Tung Ko, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration

Kong-Pang Pun, Chi-Tung Ko, Andreas Gothenberg, 2015, Microelectron. J..

A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches

Kong-Pang Pun, Lei Sun, Bing Li, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

A charge-pump and comparator based power-efficient pipelined ADC technique

Kong-Pang Pun, Xian Tang, Chi-Tung Ko, 2012, Microelectron. J..

A dynamic element matching technique for multi-bit quadrature delta-sigma modulators

Kong-Pang Pun, Chi-Tung Ko, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection

Kong-Pang Pun, Chi-Tung Ko, Siu-Kei Tang, 2011, Microelectron. J..

Vernier parallel delay-line based time-to-digital converter

Kong-Pang Pun, Chi-Tung Ko, Andreas Gothenberg, 2012 .