Saurabh Chaudhury

发表

State Assignment and Polarity Selection for Low Dynamic Power and Testable Finite State Machine Synthesis

Santanu Chattopadhyay, Saurabh Chaudhury, J. Srinivasa Rao, 2009, J. Low Power Electron..

Synthesis ofFinite State Machines forLowStatic andDynamicPower

Saurabh Chaudhury, 2007 .

A Novel SRAM Cell Design with a Body-Bias Controller Circuit for Low Leakage, High Speed and Improved Stability

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2017, Wirel. Pers. Commun..

A comparative study on the effects of technology nodes and logic styles for low power high speed VLSI applications

Saurabh Chaudhury, Inamul Hussain, 2020 .

Image Quality Assessment with Structural Similarity Using Wavelet Families at Various Decompositions

Saurabh Chaudhury, Ashoke Kumar Sinha, Jayesh D. Ruikar, 2016 .

Masi entropy based multilevel thresholding for image segmentation

Saurabh Chaudhury, Abdul Kayom Md Khairuzzaman, S. Chaudhury, 2019, Multimedia Tools and Applications.

Dynamic Threshold Sleep Transistor Technique for High Speed and Low Leakage in CMOS Circuits

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2017, Circuits Syst. Signal Process..

A Review on the Effects of Technology on CMOS and CPL Logic Style on Performance, Speed and Power Dissipation

Saurabh Chaudhury, Avtar Singh, Inamul Hussain, 2018, 2018 IEEE Electron Devices Kolkata Conference (EDKCON).

CNFET Based Low Power Full Adder Circuit for VLSI Applications

Saurabh Chaudhury, Inamul Hussain, 2020 .

Genetic algorithm based variable ordering of BDDs for multi-level logic optimization with area-power trade-offs

Anirban Dutta, Saurabh Chaudhury, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Performance Analysis of Generational GA over Microbial GA for Two-level Logic Minimization with Area and Power Trade-offs

Saurabh Chaudhury, Akhil Kumar Gupta, 2009 .

Efficient technique for rice grain classification using back-propagation neural network and wavelet decomposition

Saurabh Chaudhury, Ksh. Robert Singh, S. Chaudhury, 2016, IET Comput. Vis..

Algorithmic Optimization of BDDs and Performance Evaluation for Multi-level Logic Circuits with Area and Power Trade-offs

Anirban Dutta, Saurabh Chaudhury, 2011, Circuits Syst..

Design and Analysis of High Performance Multiplier Circuit

Saurabh Chaudhury, Inamul Hussain, Chandan Kumar Pandey, 2019, 2019 Devices for Integrated Circuit (DevIC).

Histogram Equalization-A Simple but Efficient Technique for Image Enhancement

Saurabh Chaudhury, Ananta Kumar Roy, 2013 .

Moth-Flame Optimization Algorithm Based Multilevel Thresholding for Image Segmentation

Saurabh Chaudhury, Abdul Kayom Md Khairuzzaman, S. Chaudhury, 2017, Int. J. Appl. Metaheuristic Comput..

A Novel PMOS Data Retention Leakage Power Reduction Design

Rohit Lorenzo, Saurabh Chaudhury, 2014, 2014 Fourth International Conference on Communication Systems and Network Technologies.

Image Quality Assessment Using Edge Correlation

Saurabh Chaudhury, Ashoke Kumar Sinha, Jayesh D. Ruikar, 2017 .

Brain MR Image Multilevel Thresholding by Using Particle Swarm Optimization, Otsu Method and Anisotropic Diffusion

Saurabh Chaudhury, Abdul Kayom Md Khairuzzaman, S. Chaudhury, 2019, Int. J. Appl. Metaheuristic Comput..

Designing a filter bank and an adaptive filtering technique to eliminate noises in power line communication

Anirban Sengupta, Saurabh Chaudhury, 2012, 2012 Power Engineering and Automation Conference.

A new ultra low leakage and high speed technique for CMOS circuits

Rohit Lorenzo, Saurabh Chaudhury, 2014, 2014 Students Conference on Engineering and Systems.

A New 4-2 Compressor for VLSI Circuits and Systems

Saurabh Chaudhury, Inamul Hussain, 2021 .

Genetic algorithm-based FSM synthesis with area-power trade-offs

Santanu Chattopadhyay, Saurabh Chaudhury, Krishna Teja Sistla, 2009, Integr..

A Genetic Algorithm Based Input State Assignment Technique for Leakage Power Minimization during Combinational Logic Synthesis

Santanu Chattopadhyay, Saurabh Chaudhury, Ansuman Prusty, 2007 .

Comparative analysis of texture feature extraction techniques for rice grain classification

Saurabh Chaudhury, Ksh. Robert Singh, S. Chaudhury, 2020, IET Image Process..

Leakage Minimization in CMOS VLSI Circuits: A Brief Review

Rohit Lorenzo, Saurabh Chaudhury, 2016 .

A cascade network for the classification of rice grain based on single rice kernel

Saurabh Chaudhury, Ksh Robert Singh, S. Chaudhury, 2020, Complex & Intelligent Systems.

An Integrated Approach of Logarithmic Transformation and Histogram Equalization for Image Enhancement

Saurabh Chaudhury, Sudhankar Raw, Abhradeep Biswas, 2014, SocProS.

Output phase assignment for area and power minimization in PLAs

Saurabh Chaudhury, and Santanu Chattopadhyay, 2013 .

Texture Analysis for Rice Grain Classification Using Wavelet Decomposition and Back Propagation Neural Network

Saurabh Chaudhury, Ksh. Robert Singh, 2019 .

Synthesis ofFinite State Machines forLowPower andTestability

Saurabh Chaudhury, 2006 .

Output PhaseAssignment forAreaand Power Optimization inMulti -levelMulti -output Combinational LogicCircuits

Santanu Chattopadhyay, Saurabh Chaudhury, 2006 .

A novel 9T SRAM architecture for low leakage and high performance

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2017 .

Multilevel thresholding using grey wolf optimizer for image segmentation

Saurabh Chaudhury, Abdul Kayom Md Khairuzzaman, S. Chaudhury, 2017, Expert Syst. Appl..

Vehicle Detection and Counting the Number of Vehicles for Intelligent Traffic Control Using LabVIEW—An Image Processing Approach

Saurabh Chaudhury, Prakash Majumder, 2020 .

Design and implementation of a DCTQ processor for low area, power and high performance

Saurabh Chaudhury, Debashish Dash, 2016, 2016 International Conference on Signal Processing, Communication, Power and Embedded System (SCOPES).

Fast and High-Performing 1-Bit Full Adder Circuit Based on Input Switching Activity Patterns and Gate Diffusion Input Technique

Saurabh Chaudhury, Inamul Hussain, S. Chaudhury, 2020, Circuits, Systems, and Signal Processing.

Review of Circuit Level Leakage Minimization Techniques in CMOS VLSI Circuits

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2017 .

A Tutorial and Survey on Thermal-Aware VLSI Design: Tools and Techniques

Saurabh Chaudhury, 2009 .

Modified Moth-Flame Optimization Algorithm-Based Multilevel Minimum Cross Entropy Thresholding for Image Segmentation

Saurabh Chaudhury, Abdul Kayom Md Khairuzzaman, S. Chaudhury, 2020, Int. J. Swarm Intell. Res..

Optimal Body Bias to Control Stability, Leakage and Speed in SRAM Cell

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2016, J. Circuits Syst. Comput..

Analysis of leakage feedback technique

Rohit Lorenzo, Saurabh Chaudhury, S. Chaudhury, 2014, International Conference on Electronics, Communication and Instrumentation (ICECI).

Synthesis of Finite State Machines for Low Power and Testability

Santanu Chattopadhyay, Saurabh Chaudhury, J. Srinivasa Rao, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A new approach for image segmentation with MATLAB

Saurabh Chaudhury, Indrani Pal, 2010, 2010 International Conference on Computer and Communication Technology (ICCCT).

Design of energy-efficient multiplier based on 3:2 compressor

Saurabh Chaudhury, Inamul Hussain, 2021, ICRA 2021.

Fixed Polarity Reed-Muller Network Synthesis and Its Application in AND-OR/XOR-based Circuit Realization with Area-Power Trade-off

Santanu Chattopadhyay, Saurabh Chaudhury, 2008 .

Advantage of CNTFET characteristics over MOSFET to reduce leakage power

Saurabh Chaudhury, S. K. Sinha, S. Chaudhury, 2014, 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS).