William F. Richardson

Memory array and manufacture thereof

Robert R. Doering, William F. Richardson, Bing W. Shen, 1989 .

Leakage mechanisms in the trench transistor DRAM cell

Sanjay K. Banerjee, Ashwin H. Shah, William F. Richardson, 1988 .

A 4Mb DRAM with cross point trench transistor cell

Sanjay K. Banerjee, Bao Tran, James D. Gallia, 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

TITE RAM: A NEW SOI DRAM GAIN CELL FOR MBIT DRAM's.

Ashwin H. Shah, Hisashi Shichijo, William F. Richardson, 1984 .

Sub-100-nm vertical MOSFET with threshold voltage adjustment

William F. Richardson, W. Richardson, K. Mori, 2002 .

A 4-Mbit DRAM with trench-transistor cell

H. E. Davis, Ashwin H. Shah, Hisashi Shichijo, 1986 .