Jae Park

SPICE simulation methodology for system level ESD design

Charvaka Duvvury, Agha Jahanzeb, Lifang Lou, 2010, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010.

The challenges of on-chip protection for system level cable discharge events (CDE)

C. Duvvury, Yen-Yi Lin, S. Marum, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

Improving microcontroller (MCU) immunity performance to system-level ESD/EFT testing through PCB system co-design methodology

Jie Chen, Rajen Murugan, Minhong Mi, 2014, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2014.