S. Sivanantham

发表

FPGA implementation of universal asynchronous transmitter and receiver

Jayesh More, Rushank Suryavanshi, Gaurav Dasarwar, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

FPGA implementation of FFT blocks for OFDM

S. Sivanantham, K. Sivasankaran, Anurag Tiwari, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Image edge detection in FPGA

S. Sivanantham, K. Sivasankaran, Tejas Khairnar, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Adaptive test clock scheme for low transition LFSR and external scan based testing

S. Sivanantham, G. Gopakumar, A. Pandey, 2013, 2013 International Conference on Computer Communication and Informatics.

A reconfigurable coprocessor units with redundant radix-4 arithmetic

S. Sivanantham, K. Sivasankaran, S. Shinde Abhijeet, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Fused floating-point add and subtract unit

Jyoti Sharma, S. Sivanantham, Pabbisetty Tarun, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

A SAD architecture for variable block size motion estimation in H.264 video coding

S. Sivanantham, Chukka Santosh, C Prayline Rajabai, 2017, 2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS).

Face detection system using FPGA

S. Sivanantham, K. Sivasankaran, Saumyarup Rana, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

High-Throughput Deblocking Filter Architecture Using Quad Parallel Edge Filter for H.264 Video Coding Systems

S. Sivanantham, Prayline Rajabai C., 2019, IEEE Access.

A novel approach for simultaneous reduction of shift and capture power for scan based testing

S. Sivanantham, V. Sandeep, P.S. Mallick, 2011, 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies.

An area-efficient 32-bit floating point multiplier using hybrid GPPs addition

S. Sivanantham, J. Jean Jenifer Nesam, 2017, 2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS).

Verilog implementation of fully pipelined and multiplierless 2D DCT/IDCT JPEG architecture

S. Sivanantham, K. Sivasankaran, R. Sri Sruthi, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Reduction of testing power with pulsed scan flip-flop for scan based testing

S. Sivanantham, P.S. Mallick, D. Satya Valibaba, 2011, 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies.

Low power reconfigurable multiplier with reordering of partial products

S. Balamurugan, S. Sivanantham, P.S. Mallick, 2011, 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies.

Adaptive Low Power RTPG for BIST based test applications

S. Sivanantham, R. T. John, K. D. Sreekanth, 2013, 2013 International Conference on Information Communication and Embedded Systems (ICICES).

Design and implementation of 16×16 modified booth multiplier

S. Sivanantham, K. Sivasankaran, Manjunath, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

VLSI implementation of fast convolution

S. Sivanantham, K. Sivasankaran, Pankaj Katkar, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Modeling and Test Generation for Combinational Hardware Trojans

S. Sivanantham, Manisha Vinta, 2020, 2020 IEEE International Test Conference India.

Home automation through FPGA controller

S. Sivanantham, K. Sivasankaran, Shubhi Sharma, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Implementation of radix-4 butterfly structure to prevent arithmetic overflow

S. Niharika, S. Sivanantham, K. Sivasankaran, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Implementation of Blake 256 hash function for password encryption and parallel CRC

S. Sivanantham, K. Sivasankaran, Ritu Gupta, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Study of approximate compressors for multiplication using FPGA

R. Priyanka, S. Sivanantham, K. Sivasankaran, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Sine and cosine generator using CORDIC algorithm implemented in ASIC

S. Sivanantham, K. Sivasankaran, Ansuman Mishra, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Efficient half-precision floating point multiplier targeting color space conversion

S. Sivanantham, J. Jean Jenifer Nesam, 2019, Multimedia Tools and Applications.

FPGA implementation of edge detection using Canny algorithm

S. Sivanantham, K. Sivasankaran, R. Jeyakumar, 2015, 2015 Online International Conference on Green Engineering and Technologies (IC-GET).

Rule precision index classifier: an associative classifier with a novel pruning measure for intrusion detection

J. Senthilkumar, V. Mohanraj, S. Sivanantham, 2021, Personal and Ubiquitous Computing.

Reduction of Test Power and Test Data Volume by Power Aware Compression Scheme

S. Sivanantham, K. Sarathkumar, P. S. Mallick, 2012, 2012 International Conference on Advances in Computing and Communications.