Antonio García

发表

Application of a one‐dimensional spray model to teach diffusion flame fundamentals for engineering students

José María García-Oliver, Antonio García, Joaquín de la Morena, 2019, Comput. Appl. Eng. Educ..

An Infocard-Based Proposal for Unified Single Sign on

Ivan Marsá-Maestre, Bernardo Alarcos, Antonio García, 2009, 2009 Ninth Annual International Symposium on Applications and the Internet.

Elliptic Curve Cryptography hardware accelerator for high-performance secure servers

Antonio García, Luís Parrilla Roure, José Antonio Álvarez-Bermejo, 2018, The Journal of Supercomputing.

Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies

Fred J. Taylor, Antonio García, Javier Ramírez, 2003, J. VLSI Signal Process..

Teaching combustion thermochemistry with an interactive Matlab application

José María García-Oliver, Antonio García, Joaquín de la Morena, 2019, Comput. Appl. Eng. Educ..

Quantization analysis and enhancement of a VLSI gradient-based motion estimation architecture

Antonio García, Guillermo Botella Juan, Uwe Meyer-Bäse, 2012, Digit. Signal Process..

Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform

Antonio García, Luis Parrilla, Javier Ramírez, 2000, FPL.

Intellectual Property Protection for RNS Circuits on FPGAs

Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz, 2004, FPL.

Efficient Rns-based Design of Programmable Fir Filters Targeting Fpl Technology

Antonio García, Javier Ramírez, Uwe Meyer-Bäse, 2005, J. Circuits Syst. Comput..

Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology

Antonio García, Encarnación Castillo, Guillermo Botella Juan, 2012, Microprocess. Microsystems.

Spoken Spanish generation from sign language

Antonio García, Rubén San-Segundo-Hernández, Javier Ferreiros, 2010, Interact. Comput..

Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers

Antonio García, Encarnación Castillo, Antonio Lloris-Ruíz, 2005, PATMOS.

Exploiting Analog and Digital Reconfiguration for Smart Sensor Interfacing

Antonio García, Alberto J. Palma, Encarnación Castillo, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Pro-Two: a hardware based platform for real time type-2 fuzzy inference

Antonio García, Carlos Andrés Peña-Reyes, Miguel A. Melgarejo, 2004, 2004 IEEE International Conference on Fuzzy Systems (IEEE Cat. No.04CH37542).

A new area-efficient BCD-digit multiplier

Antonio García, Encarnación Castillo, Diego P. Morales, 2017, Digit. Signal Process..

Computational model and architectural proposal for a hardware type-2 fuzzy system

Antonio García, Carlos Andrés Peña-Reyes, Miguel A. Melgarejo, 2004, Neural Networks and Computational Intelligence.

IPP@HDL: Efficient Intellectual Property Protection Scheme for IP Cores

Antonio García, Luis Parrilla, Encarnación Castillo, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic

Fred J. Taylor, Antonio García, Uwe Meyer-Bäse, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Area*Time Optimized Hogenauer Channelizer Design Using FPL Devices

Antonio García, Javier Ramírez, Uwe Meyer-Bäse, 2004, FPL.

Design and Implementation of RNS-Based Adaptive Filters

Antonio García, Javier Ramírez, Uwe Meyer-Bäse, 2003, FPL.

Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration

Antonio García, Alberto J. Palma, Encarnación Castillo, 2008, 2008 International Conference on Field Programmable Logic and Applications.

U. Meyer-Baese, A. Lloris: Fast RNS FPL-based Communications Receiver Design and Implementation

Antonio García, Javier Ramírez, J. Ramírez, 2002, FPL.

Wearable System for Biosignal Acquisition and Monitoring Based on Reconfigurable Technologies

Antonio García, Luís Parrilla Roure, Encarnación Castillo, 2019, Sensors.

A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems

Antonio García, Graham A. Jullien, Luis Parrilla, 2002, PATMOS.

Comments on "Fast architecture for decimal digit multiplication"

Antonio García, Luis Parrilla, Encarnación Castillo, 2016, Microprocess. Microsystems.

Smart Toys Designed for Detecting Developmental Delays

Juan R. Velasco, Bernardo Alarcos, Antonio García, 2016, Sensors.

Efficient embedded FPL resource usage for RNS-based polyphase DWT filter banks

Antonio García, Javier Ramírez, Encarnación Castillo, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A kinematic model of continuous separation and classification of polydisperse suspensions

Antonio García, Raimund Bürger, Kenneth H. Karlsen, 2008, Comput. Chem. Eng..

Design of RNS-based distributed arithmetic DWT filterbanks

Fred J. Taylor, Antonio García, Javier Ramírez, 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

Pipelined Hogenauer CIC filters using field-programmable logic and residue number system

Fred J. Taylor, Antonio García, Uwe Meyer-Bäse, 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic

Fred J. Taylor, Antonio García, Javier Ramírez, 2002, J. VLSI Signal Process..

Paper title: Design, Development and Field Evaluation of a Spanish into Sign Language Translation System

Antonio García, Fernando Fernández Martínez, Rubén San-Segundo-Hernández, 2009 .

IPP Watermarking Technique for IP Core Protection on FPL Devices

Antonio García, Encarnación Castillo, Uwe Meyer-Bäse, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic

Fred J. Taylor, Antonio García, Uwe Meyer-Bäse, 2001, J. VLSI Signal Process..

Low-Cost Soft Error Robust Hardened D-Latch for CMOS Technology Circuit

Antonio García, Noel Rodriguez, Encarnación Castillo, 2021 .

Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2m) fields

Antonio García, Luis Parrilla, Antonio Lloris, 2012 .