Ramesh Karri

发表

Engineering crossbar based emerging memory technologies

Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

System-level power optimization for wireless multimedia communication : power aware computing

Ramesh Karri, David J. Goodman, 2002 .

IC/IP Piracy Assessment of Reversible Logic

Robert Wille, Rolf Drechsler, Ramesh Karri, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

ConFirm: Detecting firmware modifications in embedded systems using Hardware Performance Counters

Michail Maniatakos, Ramesh Karri, Charalambos Konstantinou, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A Survey of Cybersecurity and Resilience of Digital Manufacturing pdf

Ramesh Karri, Panganamala Ramana Kumar, Satish T. S. Bukkapatnam, 2020, ArXiv.

A secure design-for-test infrastructure for lifetime security of SoCs

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Poisoning the (Data) Well in ML-Based CAD: A Case Study of Hiding Lithographic Hotspots

Ramesh Karri, Siddharth Garg, Kang Liu, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Fault-based side-channel cryptanalysis tolerant Rijndael symmetric block cipher architecture

Ramesh Karri, Kaijie Wu, Piyush Mishra, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking pdf

Hai Zhou, Franco Stellari, Ujjwal Guin, 2020, ArXiv.

Reusing Hardware Performance Counters to Detect and Identify Kernel Control-Flow Modifying Rootkits

Ramesh Karri, Xueyang Wang, R. Karri, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Computer-aided design-for-reliability of deep sub-micron integrated circuits

Ramesh Karri, Aurobindo Dasgupta, 1996 .

Hardware Performance Counter-Based Malware Identification and Detection with Adaptive Compressive Sensing

Ramesh Karri, Xueyang Wang, Sek Chai, 2016, ACM Trans. Archit. Code Optim..

Security of Cloud FPGAs: A Survey pdf

Jeyavijayan Rajendran, Ramesh Karri, Chenglu Jin, 2020, ArXiv.

AES design space exploration new line for scan attack resiliency

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2014, 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC).

Hardware security: Threat models and metrics

Jeyavijayan Rajendran, Ramesh Karri, Farinaz Koushanfar, 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Guest Editorial Special Issue on Secure and Trustworthy Computing

Ramesh Karri, Ozgur Sinanoglu, 2016, JETC.

Pipeline data path synthesis of fault-tolerant microarchitectures

Ramesh Karri, Alex Orailoglu, A. Orailoglu, 1992, [1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems.

A Survey of Microarchitecture Support for Embedded Processor Security

Ramesh Karri, Sateesh Addepalli, Arun K. Kanuparthi, 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

Energy-efficient secure embedded systems

Ramesh Karri, Piyush Mishra, 2004 .

Trustworthy Hardware [Scanning the Issue]

Ramesh Karri, Farinaz Koushanfar, 2014, Proc. IEEE.

Built in self test: a complete test solution for telecommunication systems

Nilanjan Mukherjee, Ramesh Karri, Tapan J. Chakraborty, 1999, IEEE Commun. Mag..

Low cost concurrent error detection for the advanced encryption standard

Ramesh Karri, Kaijie Wu, Michael Goessel, 2004 .

Synthesis of application specific programmable processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1997, DAC.

Reconciling the Dichotomy Between Test and Security

Ramesh Karri, Ozgur Sinanoglu, Yiorgos Makris, 2013, ETS 2013.

Automotive Electrical and Electronic Architecture Security via Distributed In-Vehicle Traffic Monitoring

Martin Lukasiewycz, Philipp Mundhenk, Ramesh Karri, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An investigation into the design of energy-efficient session negotiation protocols for wireless networks

Ramesh Karri, Piyush Mishra, 2003, GLOBECOM '03. IEEE Global Telecommunications Conference (IEEE Cat. No.03CH37489).

Guest Editorial Special Section on Hardware Security and Trust

Ahmad-Reza Sadeghi, Ramesh Karri, Ozgur Sinanoglu, 2015, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Heterogeneous built-in resiliency of application specific programmable processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1996, Proceedings of International Conference on Computer Aided Design.

Reusing the IEEE 1500 design for test infrastructure for security monitoring of Systems-on-Chip

Ramesh Karri, Jerry Backer, David Hély, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking

Ramesh Karri, Siddharth Garg, Kaijie Wu, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Low-Cost Concurrent Error Detection for GCM and CCM

Ramesh Karri, Xiaofei Guo, 2014, J. Electron. Test..

Hardware Architectures for Post-Quantum Digital Signature Schemes

Ramesh Karri, Najwa Aaraj, Kanad Basu, 2021 .

Power optimization using divide-and-conquer techniques for minimization of the number of operations

Miodrag Potkonjak, Ramesh Karri, Inki Hong, 1997, ICCAD.

Automatic Synthesis of Self-Recovering VLSI Systems

Ramesh Karri, Alex Orailoglu, R. Karri, 1996, IEEE Trans. Computers.

Heterogeneous built-in resiliency of application specific programmable processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1996, ICCAD 1996.

Electromigration reliability enhancement via bus activity distribution

Ramesh Karri, Aurobindo Dasgupta, 1996, DAC '96.

Security Assessment of Interposer-based Chiplet Integration pdf

Ramesh Karri, Kanad Basu, Mohammed Shayan, 2020, ArXiv.

On Improving the Security of Logic Locking

Ramesh Karri, Ozgur Sinanoglu, Muhammad Yasin, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Standard seven segmented display for Burmese numerals

Ramesh Karri, A. Orailoglu, 1990 .

Anomaly Detection in Embedded Systems Using Power and Memory Side Channels

Ramesh Karri, Siddharth Garg, Farshad Khorrami, 2020, 2020 IEEE European Test Symposium (ETS).

NIST Post-Quantum Cryptography- A Hardware Evaluation Study

Ramesh Karri, Mohammed Nabeel, Deepraj Soni, 2019, IACR Cryptol. ePrint Arch..

Programmable Daisychaining of Microelectrodes to Secure Bioassay IP in MEDA Biochips

Ramesh Karri, Krishnendu Chakrabarty, Tung-Che Liang, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design and analysis of ring oscillator based Design-for-Trust technique

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2011, 29th VLSI Test Symposium.

A Survey of Cybersecurity of Digital Manufacturing

Ramesh Karri, A. L. Narasimha Reddy, Priyanka Mahesh, 2020, Proceedings of the IEEE.

New scan-based attack using only the test mode

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

High-level synthesis of self-recovering microarchitectures

Ramesh Karri, Alex Orailoglu, R. Karri, 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

System-Level Power Optimization for Wireless Multimedia

Ramesh Karri, David J. Goodman, D. Goodman, 2002 .

Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 2000, IEEE Trans. Computers.

Ramesh Karri, Kaijie Wu, Richard Stern, 2007 .

High Assurance Virtualization Engine (HAVEN)

Ramesh Karri, Nasir Memon, Vikram Padman, 2009 .

Heterogeneous BISR-approach using system level synthesis flexibility

Miodrag Potkonjak, Ramesh Karri, Inki Hong, 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

The Association for Computing Machinery/Special Interest Group on Design Automation (ACWSIGDA) presents its Distinguished Service Award

Maysam Ghovanloo, Yu-Wei Chang, Anantha P. Chandrakasan, 2004 .

Synthesis of fault-tolerant application specific programmable processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1998 .

Minimizing energy consumption of secure wireless session with QoS constraints

Ramesh Karri, Piyush Mishra, 2002, 2002 IEEE International Conference on Communications. Conference Proceedings. ICC 2002 (Cat. No.02CH37333).

Abetting Planned Obsolescence by Aging 3D Networks-on-Chip

Partha Pratim Pande, Ramesh Karri, Krishnendu Chakrabarty, 2018, 2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

A heterogeneous built-in self-repair approach using system-level synthesis flexibility

Miodrag Potkonjak, Ramesh Karri, Inki Hong, 2004, IEEE Transactions on Reliability.

Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique

Ramesh Karri, Kaijie Wu, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Cybersecurity for Control Systems: A Process-Aware Perspective

Ramesh Karri, Prashanth Krishnamurthy, Farshad Khorrami, 2016, IEEE Design & Test.

Provably Secure Concurrent Error Detection for Advanced Encryption Standard

Debdeep Mukhopadhyay, Ramesh Karri, Xiaofei Guo, 2014 .

Exploiting idle cycles for algorithm level re-computing

Ramesh Karri, Kaijie Wu, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Programmable Daisychaining of Microelectrodes for IP Protection in MEDA Biochips

Ramesh Karri, Krishnendu Chakrabarty, Tung-Che Liang, 2019, 2019 IEEE International Test Conference (ITC).

Optimal algorithms for synthesis of reliable application-specific heterogeneous multiprocessors

Ramesh Karri, Aurobindo Dasgupta, R. Karri, 1995 .

Algorithmic level recomputing with shifted operands: A high level synthesis approach to concurrent error detection

Ramesh Karri, Kaijie Wu, R. Karri, 2000 .

DPFEE: A High Performance Scalable Pre-Processor for Network Security Systems

Ramesh Karri, Vinayaka Jyothi, Sateesh K. Addepalli, 2018, IEEE Transactions on Multi-Scale Computing Systems.

Memristor based programmable threshold logic array

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2010, 2010 IEEE/ACM International Symposium on Nanoscale Architectures.

The Cybersecurity Landscape in Industrial Control Systems

Michail Maniatakos, Ramesh Karri, Lucas Davi, 2016, Proceedings of the IEEE.

Tamper-resistant pin-constrained digital microfluidic biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2018, DAC.

Challenges and New Directions for AI and Hardware Security

Ramesh Karri, Benjamin Tan, 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS).

Recomputing with Permuted Operands: A Concurrent Error Detection Approach

Ramesh Karri, Xiaofei Guo, R. Karri, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Optimizing Ipsec for Energy-Efficient Secure Wireless Sessions

Ramesh Karri, Piyush Mishra, 2002 .

Desieve the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Anomaly Detection in Real-Time Multi-Threaded Processes Using Hardware Performance Counters

Ramesh Karri, Prashanth Krishnamurthy, Farshad Khorrami, 2020, IEEE Transactions on Information Forensics and Security.

Quantum-Dot Cellular Automata Design Guideline

Ramesh Karri, Kaijie Wu, Kyosun Kim, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Research Challenges in Security-Aware Physical Design

Ramesh Karri, 2017, ISPD '17.

Architectural-level fault tolerant computation in nanoelectronic processors

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2005, 2005 International Conference on Computer Design.

Security and Testing

Ramesh Karri, Kurt Rosenfeld, 2012 .

Selectively breaking data dependences to improve the utilization of idle cycles in algorithm level re-computing data paths

Ramesh Karri, Kaijie Wu, 2003, IEEE Trans. Reliab..

New Scan-Based Attack Using Only the Test Mode and an Input Corruption Countermeasure

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2013, VLSI-SoC.

Detecting malicious modifications of data in third-party intellectual property cores

Jeyavijayan Rajendran, Ramesh Karri, Vivekananda Vedula, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Sensor physical unclonable functions

Ramesh Karri, Kurt Rosenfeld, Efstratios Gavas, 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Introspection: A register transfer level technique for cocurrent error detection and diagnosis in data dominated designs

Ramesh Karri, Balakrishnan Iyer, B. Iyer, 2001, TODE.

Security and Trust

Ramesh Karri, Krishnendu Chakrabarty, Jack Tang, 2019, Secure and Trustworthy Cyberphysical Microfluidic Biochips.

Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard

Ramesh Karri, Bo Yang, Kaijie Wu, 2004, 2004 International Conferce on Test.

Secure design-for-debug for Systems-on-Chip

Ramesh Karri, Jerry Backer, David Hély, 2015, 2015 IEEE International Test Conference (ITC).

Hardware Trojan Detection Using Controlled Circuit Aging

Jorg Henkel, Ramesh Karri, Farshad Khorrami, 2020, IEEE Access.

Can the SHIELD protect our integrated circuits?

Ramesh Karri, Farinaz Koushanfar, 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

Towards Secure Analog Designs: A Secure Sense Amplifier Using Memristors

Jeyavijayan Rajendran, Ramesh Karri, David H. K. Hoe, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

High-Level Synthesis of Fault-Secure Microarchitectures

Ramesh Karri, Alex Orailoglu, 1993, 30th ACM/IEEE Design Automation Conference.

Are hardware performance counters a cost effective way for integrity checking of programs

Ramesh Karri, Mohamed Zahran, Corey Malone, 2011, STC '11.

2012 JETTA Reviewers

Luigi Carro, Fernando Morgado Dias, Irith Pomeranz, 2013, J. Electron. Test..

Concurrent Error Detection Schemes for Involution Ciphers

Ramesh Karri, Kaijie Wu, Nikhil Joshi, 2004, CHES.

FPGA Trust Zone: Incorporating trust and reliability into FPGA designs

Ramesh Karri, Vinayaka Jyothi, Richard Stern, 2016, 2016 IEEE 34th International Conference on Computer Design (ICCD).

On the Difficulty of Inserting Trojans in Reversible Computing Architectures

Robert Wille, Rolf Drechsler, Ramesh Karri, 2017, IEEE Transactions on Emerging Topics in Computing.

Switch level hot-carrier reliability enhancement of VLSI circuits

Ramesh Karri, Aurobindo Dasgupta, 1995, Proceedings of International Workshop on Defect and Fault Tolerance in VLSI.

Securing digital microfluidic biochips by randomizing checkpoints

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2016, 2016 IEEE International Test Conference (ITC).

Versatile BIST: an integrated approach to on-line/off-line BIST

Ramesh Karri, Nilanjan Mukherjee, 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

Security analysis of concurrent error detection against differential fault analysis

Debdeep Mukhopadhyay, Ramesh Karri, Chenglu Jin, 2014, Journal of Cryptographic Engineering.

Allocation and binding during fault-secure microarchitecture synthesis

Ramesh Karri, Sergei Sokolov, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Divide and concatenate: a scalable hardware architecture for universal MAC

Ramesh Karri, Bo Yang, David A. McGrew, 2004, FPGA '04.

Security Assessment of Cyberphysical Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Ozgur Sinanoglu, 2016, IEEE/ACM Transactions on Computational Biology and Bioinformatics.

Editorial

Ramesh Karri, 2020, ACM J. Emerg. Technol. Comput. Syst..

A Design Methodology For The High-level Synthesis Of Fault-tolerant Asics

Ramesh Karri, Alex Orailoglu, R. Karri, 1992, Workshop on VLSI Signal Processing.

Cyberphysical Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2019, Secure and Trustworthy Cyberphysical Microfluidic Biochips.

Secure and Trustworthy Cyberphysical Microfluidic Biochips: A practical guide to cutting-edge design techniques for implementing secure and trustworthy cyberphysical microfluidic biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2019 .

Triple Modular Redundancy with Shifted Operands

Tongquan Wei, Ramesh Karri, Kaijie Wu, 2005 .

Reversible Circuits: IC/IP Piracy Attacks and Countermeasures

Robert Wille, Rolf Drechsler, Ramesh Karri, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Regaining Trust in VLSI Design: Design-for-Trust Techniques

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2014, Proceedings of the IEEE.

Guest editor's introduction to special section on high-level design validation and test

Ramesh Karri, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

NREPO: Normal basis Recomputing with Permuted Operands

Debdeep Mukhopadhyay, Ramesh Karri, Chenglu Jin, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Training Data Poisoning in ML-CAD: Backdooring DL-based Lithographic Hotspot Detectors

Ramesh Karri, Kang Liu, Benjamin Tan, 2020 .

Architectures and protocols that enable new applications on optical networks

Ramesh Karri, Malathi Veeraraghavan, Tim Moors, 2001 .

Optimal self-recovering microarchitecture synthesis

Ramesh Karri, Alex Orailoglu, R. Karri, 1993, FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing.

Nano-PPUF: A Memristor-Based Security Primitive

Miodrag Potkonjak, Jeyavijayan Rajendran, Ramesh Karri, 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

Nanoelectronic Solutions for Hardware Security

Miodrag Potkonjak, Jeyavijayan Rajendran, Ramesh Karri, 2012, IACR Cryptology ePrint Archive.

Sneak-path Testing of Memristor-based Memories

Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

Improving GPU Robustness by making use of faulty parts

Ramesh Karri, Mohamed Zahran, Artem Durytskyy, 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

Rapid prototyping of fault tolerant VLSI systems

Ramesh Karri, Alex Orailoglu, Karin Högstedt, 1994, Proceedings of 7th International Symposium on High-Level Synthesis.

Guest Editors' Introduction: Cyber-Physical Systems Security and Privacy

Michail Maniatakos, Ramesh Karri, Alvaro A. Cárdenas, 2017, IEEE Des. Test.

Can Monitoring System State + Counting Custom Instruction Sequences Aid Malware Detection?

Ramesh Karri, Kanad Basu, Aditya Rohan, 2019, 2019 IEEE 28th Asian Test Symposium (ATS).

Parity-based concurrent error detection in symmetric block ciphers

Ramesh Karri, Michael Gössel, Grigori Kuznetsov, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

High-reliability, low-energy microarchitecture synthesis

Ramesh Karri, Aurobindo Dasgupta, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Transformation-based register optimization in high-level synthesis

Ramesh Karri, Alex Orailoglu, 1992, [1992] Conference Record of the Twenty-Sixth Asilomar Conference on Signals, Systems & Computers.

Molecular Barcoding as a Defense Against Benchtop Biochemical Attacks on DNA Fingerprinting and Information Forensics

Ramesh Karri, Krishnendu Chakrabarty, Kristin C. Scott, 2020, IEEE Transactions on Information Forensics and Security.

Computer-Aided Design of Fault-Tolerant VLSI Systems

Ramesh Karri, Alex Orailoglu, Karin Högstedt, 1996, IEEE Des. Test Comput..

Security Assessment of Microfluidic Fully-Programmable-Valve-Array Biochips

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2019, 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID).

Split Manufacturing-Based Register Transfer-Level Obfuscation

Ramesh Karri, Siddharth Garg, Kaijie Wu, 2019, ACM J. Emerg. Technol. Comput. Syst..

Stealthy Rootkits in Smart Grid Controllers

Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Prevention: Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2019, Secure and Trustworthy Cyberphysical Microfluidic Biochips.

Balancing performance and fault detection for GPGPU workloads

Ramesh Karri, Jerry Backer, R. Karri, 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

Security Implications of Cyberphysical Flow-Based Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2017, 2017 IEEE 26th Asian Test Symposium (ATS).

Leveraging Memristive Systems in the Construction of Digital Logic Circuits

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2012, Proceedings of the IEEE.

Towards designing robust QCA architectures in the presence of sneak noise paths

Ramesh Karri, Kaijie Wu, Kyosun Kim, 2005, Design, Automation and Test in Europe.

Secure Assay Execution on MEDA Biochips to Thwart Attacks Using Real-Time Sensing

Ramesh Karri, Krishnendu Chakrabarty, Mohammed Shayan, 2020, ACM Trans. Design Autom. Electr. Syst..

Scan based side channel attack on dedicated hardware implementations of Data Encryption Standard

Ramesh Karri, Bo Yang, Kaijie Wu, 2004 .

High speed architectures for Leviathan: a binary tree based stream cipher

Ramesh Karri, David A. McGrew, Bo Yang, 2004, Microprocess. Microsystems.

VLSI testing based security metric for IC camouflaging

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 IEEE International Test Conference (ITC).

Emerging (un-)reliability based security threats and mitigations for embedded systems: special session

Jörg Henkel, Ramesh Karri, Prashanth Krishnamurthy, 2017, CASES.

Phantom redundancy: a register transfer level technique for gracefully degradable data path synthesis

Israel Koren, Ramesh Karri, Balakrishnan Iyer, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Microfluidic encryption of on-chip biochemical assays

Mohamed Ibrahim, Ramesh Karri, Ozgur Sinanoglu, 2016, 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Security-aware SoC test access mechanisms

Ramesh Karri, Kurt Rosenfeld, 2011, 29th VLSI Test Symposium.

Reconciling the IC test and security dichotomy

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 18th IEEE European Test Symposium (ETS).

Detection: Randomizing Checkpoints on Cyberphysical Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2020 .

Transformation-based high-level synthesis of fault-tolerant ASICs

Ramesh Karri, Alex Orailoglu, R. Karri, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

ASSURE: RTL Locking Against an Untrusted Foundry pdf

Ramesh Karri, Donatella Sciuto, Christian Pilato, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Energy-Efficient Memristive Threshold Logic Circuit

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2012, IEEE Transactions on Computers.

The Robust QCA Adder Designs Using Composable QCA Building Blocks

Ramesh Karri, Kaijie Wu, Kyosun Kim, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

ALPS: an algorithm for pipeline data path synthesis

Ramesh Karri, Alex Orailoglu, R. Karri, 1991, MICRO 24.

Simultaneous scheduling and binding for power minimization during microarchitecture synthesis

Ramesh Karri, Aurobindo Dasgupta, 1995, ISLPED '95.

Security engineering of nanostructures and nanomaterials

Ramesh Karri, Davood Shahrjerdi, Abdullah Alharbi, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers

Ramesh Karri, Michael Gössel, Grigori Kuznetsov, 2003, CHES.

Toward Secure Microfluidic Fully Programmable Valve Array Biochips

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A study on the effectiveness of Trojan detection techniques using a red team blue team approach

Mark Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri, 2013, 2013 IEEE 31st VLSI Test Symposium (VTS).

Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2011, Computer.

Detecting Kernel Control-Flow Modifying Rootkits

Ramesh Karri, Xueyang Wang, 2014, Network Science and Cybersecurity.

Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow

Ramesh Karri, Mohammed Nabeel, Kanad Basu, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

NumChecker: Detecting kernel control-flow modifying rootkits by using Hardware Performance Counters

Ramesh Karri, Xueyang Wang, R. Karri, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

Fault secure datapath synthesis using hybrid time and hardware redundancy

Ramesh Karri, Kaijie Wu, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Sneak-Path Testing of Crossbar-Based Nonvolatile Random Access Memories

Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, 2013, IEEE Transactions on Nanotechnology.

Power Optimization for Universal Hash Function Data Path Using Divide-and-Concatenate Technique

Ramesh Karri, Bo Yang, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications

Miodrag Potkonjak, Jeyavijayan Rajendran, Ramesh Karri, 2015, Proceedings of the IEEE.

Guest Editorial Integrated Circuit and System Security

Miodrag Potkonjak, Ramesh Karri, Ingrid Verbauwhede, 2012, IEEE Trans. Inf. Forensics Secur..

Secure Scan: A Design-for-Test Architecture for Crypto Chips

Ramesh Karri, Bo Yang, Kaijie Wu, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Blue team red team approach to hardware trust assessment

Jeyavijayan Rajendran, Ramesh Karri, Vinayaka Jyothi, 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

Toward Secure Checkpointing for Micro-Electrode-Dot-Array Biochips

Ramesh Karri, Sukanta Bhattacharjee, Krishnendu Chakrabarty, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Globalization of the semiconductor industry and associated supply chains have made integrated circuits increasingly vulnerable to Trojans. Researchers must expand efforts to verify trust in intellectual property cores and ICs.

Jeyavijayan Rajendran, Ramesh Karri, Kurt Rosenfeld, 2011 .

Design of a high-performance RSVP-TE hardware signaling accelerator

H. Wang, Ramesh Karri, Malathi Veeraraghavan, 2005, IEEE Journal on Selected Areas in Communications.

Cybersecurity Road Map for Digital Manufacturing

Nektarios Georgios Tsoutsos, Ramesh Karri, Nikhil Gupta, 2020, Computer.

Test-mode-only scan attack using the boundary scan chain

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2014, 2014 19th IEEE European Test Symposium (ETS).

Automatic reconfiguration tool

Ramesh Karri, M. Brown, J Karrfalt, 2001 .

Coactive scheduling and checkpoint determination during high level synthesis of self-recovering microarchitectures

Ramesh Karri, Alex Orailoglu, R. Karri, 1994, IEEE Trans. Very Large Scale Integr. Syst..

DAVE: Deriving Automatically Verilog from English

Ramesh Karri, Benjamin Tan, Hammond Pearce, 2020, MLCAD.

Locking the Design of Building Blocks for Quantum Circuits

Robert Wille, Ramesh Karri, Samah Mohamed Saeed, 2019, ACM Trans. Embed. Comput. Syst..

Concurrent error detection architectures for symmetric block ciphers

Ramesh Karri, Kaijie Wu, Piyush Mishra, 2000 .

Time-constrained scheduling during high-level synthesis of fault-secure VLSI digital signal processors

Ramesh Karri, Alex Orailoglu, 1996, IEEE Trans. Reliab..

Shielding and securing integrated circuits with sensors

Jeyavijayan Rajendran, Ramesh Karri, Farinaz Koushanfar, 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

MINIMIZING THE SECURE WIRELESS SESSION ENERGY

Ramesh Karri, Piyush Mishra, 2001 .

Special Issue on Emerging Nanoscale Architectures for Hardware Security, Trust, and Reliability: Part 1

Miodrag Potkonjak, Ramesh Karri, 2014 .

Controlling your control flow graph

Jeyavijayan Rajendran, Ramesh Karri, Arun K. Kanuparthi, 2016, 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

Hardware Trojan Detection Using the Order of Path Delay

Ramesh Karri, Kaijie Wu, Xiaotong Cui, 2018, ACM J. Emerg. Technol. Comput. Syst..

Secure Randomized Checkpointing for Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Bio-chemical Assay Locking to Thwart Bio-IP Theft

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2020, ACM Trans. Design Autom. Electr. Syst..

Fault tolerant arithmetic with applications in nanotechnology based systems

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2004, 2004 International Conferce on Test.

Hardware Trojans Inspired IP Watermarks

Ramesh Karri, Mohammed Shayan, Kanad Basu, 2019, IEEE Design & Test.

Manufacturing and Security Challenges in 3D Printing

Nektarios Georgios Tsoutsos, Michail Maniatakos, Jeyavijayan Rajendran, 2016 .

ALPS: Algorithm for pipelined data path synthsis

Ramesh Karri, Alex Orailoglu, R. Karri, 1991 .

Test-mode-only scan attack and countermeasure for contemporary scan architectures

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2014, 2014 International Test Conference.

Toward Increasing the Difficulty of Reverse Engineering of RSFQ Circuits

Ramesh Karri, Eby G. Friedman, Kanad Basu, 2020, IEEE Transactions on Applied Superconductivity.

Scan Based Side Channel Attack on Data Encryption Standard

Ramesh Karri, Bo Yang, Kaijie Wu, 2004, IACR Cryptol. ePrint Arch..

Analysis of Energy Consumed by Secure Session Negotiation Protocols in Wireless Networks

Ramesh Karri, Piyush Mishra, 2003, PATMOS.

Can Multi-Layer Microfluidic Design Methods Aid Bio-Intellectual Property Protection?

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2019, 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Logic Mapping in Crossbar-Based Nanoarchitectures

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2009, IEEE Design & Test of Computers.

Determining an aspect of behavior of an embedded device such as, for example, detecting unauthorized modifications of the code and/or behavior of an embedded device

Ramesh Karri, Prashanth Krishnamurthy, Farshad Khorrami, 2018 .

Logic encryption: A fault analysis perspective

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Additive Manufacturing Cyber-Physical System: Supply Chain Cybersecurity and Risks

Ramesh Karri, Nikhil Gupta, Satish T. S. Bukkapatnam, 2020, IEEE Access.

Securing pressure measurements using SensorPUFs

Jeyavijayan Rajendran, Ramesh Karri, Jack Tang, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers

Ramesh Karri, Kaijie Wu, Piyush Mishra, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A hardware-accelerated implementation of the RSVP-TE signaling protocol

Tao Li, Ramesh Karri, Malathi Veeraraghavan, 2004, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577).

Malicious Firmware Detection with Hardware Performance Counters

Michail Maniatakos, Ramesh Karri, Xueyang Wang, 2016, IEEE Transactions on Multi-Scale Computing Systems.

Shadow Attacks on MEDA Biochips

Ramesh Karri, Krishnendu Chakrabarty, Sukanta Bhattacharjee, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A parameterized VHDL library for on-line testing

Ramesh Karri, Charles E. Stroud, S. Roy, 1997, Proceedings International Test Conference 1997.

Parallel memristors: Improving variation tolerance in memristive digital circuits

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks

Ramesh Karri, Bo Yang, Kaijie Wu, 2006, IEEE Transactions on Computers.

Security analysis of integrated circuit camouflaging

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, CCS.

Versatile BIST: An Integrated Approach to On-line/Off-line BIST for Data-Dominated Architectures

Ramesh Karri, Nilanjan Mukherjee, 1998, J. Electron. Test..

Towards Reverse Engineering Reversible Logic pdf

Robert Wille, Rolf Drechsler, Ramesh Karri, 2017, ArXiv.

Fault Analysis-Based Logic Encryption

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2015, IEEE Transactions on Computers.

Exploiting small leakages in masks to turn a second-order attack into a first-order attack

Sylvain Guilley, Ramesh Karri, Naghmeh Karimi, 2015, HASP@ISCA.

New scan attacks against state-of-the-art countermeasures and DFT

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

CUWS - Central University Workstation for VLSI CAD

Ramesh Karri, Tv Gopal, Prk Murti, 1988 .

Fault tolerant nanoelectronic processor architectures

Ramesh Karri, Wenjing Rao, A. Orailoglu, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Fault Analysis-based Logic Encryption (Preprint)

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013 .

ℰℱect olerant layout synthesis

Ramesh Karri, Alex Orailoglu, 1994 .

Locking of biochemical assays for digital microfluidic biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

Sneak path testing and fault modeling for multilevel memristor-based memories

Sachhidh Kannan, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Simulated annealing based yield enhancement of layouts

Ramesh Karri, Alex Orailoglu, R. Karri, 1994, Proceedings of 4th Great Lakes Symposium on VLSI.

Provably Secure Concurrent Error Detection Against Differential Fault Analysis

Debdeep Mukhopadhyay, Ramesh Karri, Xiaofei Guo, 2012, IACR Cryptol. ePrint Arch..

Reliable Integrity Checking in Multicore Processors

Ramesh Karri, Arun K. Kanuparthi, 2015, TACO.

Secure and Flexible Trace-Based Debugging of Systems-on-Chip

Ramesh Karri, Jerry Backer, David Hély, 2017, ACM Trans. Design Autom. Electr. Syst..

Synthesis of reliable application specific heterogeneous multiprocessors

Ramesh Karri, Aurobindo Dasgupta, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

Exposing Hardware Trojans in Embedded Platforms via Short-Term Aging

Ramesh Karri, Jörg Henkel, Farshad Khorrami, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Scan attack in presence of mode-reset countermeasure

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity

Ramesh Karri, Kanad Basu, Ujjwal Gupta, 2020, IEEE Transactions on Information Forensics and Security.

Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection pdf

Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg, 2019, ArXiv.

A High-Speed Hardware Architecture for Universal Message Authentication Code

Ramesh Karri, Bo Yang, David A. McGrew, 2006, IEEE Journal on Selected Areas in Communications.

Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks

Robert Wille, Ramesh Karri, Alwin Zulehner, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Modeling energy efficient secure wireless networks using network simulation

Ramesh Karri, Piyush Mishra, 2003, IEEE International Conference on Communications, 2003. ICC '03..

IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future

Ramesh Karri, Swarup Bhunia, Domenic Forte, 2019, 2019 IEEE International Test Conference (ITC).

Divide-and-concatenate: an architecture-level optimization technique for universal hash functions

Ramesh Karri, Bo Yang, David McGrew, 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Secure Scan: A Design-for-Test Architecture for Crypto Chips

Ramesh Karri, Bo Yang, Kaijie Wu, 2006, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Optimal checkpointing for secure intermittently-powered IoT devices

Ramesh Karri, Zahra Ghodsi, Siddharth Garg, 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Execution of provably secure assays on MEDA biochips to thwart attacks

Ramesh Karri, Krishnendu Chakrabarty, Mohammed Shayan, 2019, ASP-DAC.

Invariance-based concurrent error detection for Advanced Encryption Standard

Ramesh Karri, Xiaofei Guo, R. Karri, 2012, DAC Design Automation Conference 2012.

Topology aware mapping of logic functions onto nanowire-based crossbar architectures

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips?

Robert Wille, Ramesh Karri, Krishnendu Chakrabarty, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Phantom redundancy: a high-level synthesis approach for manufacturability

Ramesh Karri, Israel Koren, Balakrishnan Iyer, 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Feasibility study of dynamic Trusted Platform Module

Ramesh Karri, Mohamed Zahran, Arun K. Kanuparthi, 2010, 2010 IEEE International Conference on Computer Design.

Phantom redundancy: a high-level synthesis approach for manufacturability

Israel Koren, Ramesh Karri, Balakrishnan Iyer, 1995, ICCAD.

CAD-Base

Ramesh Karri, Krishnendu Chakrabarty, Christian Pilato, 2019, ACM Trans. Design Autom. Electr. Syst..

Design automation for hybrid CMOS-nonoelectronics crossbars

Ramesh Karri, Alex Orailoglu, Kyosun Kim, 2007, 2007 IEEE International Symposium on Nanoscale Architectures.

A High Speed Architecture for Galois/Counter Mode of Operation (GCM)

Ramesh Karri, Bo Yang, Sambit Mishra, 2005, IACR Cryptol. ePrint Arch..

Hot topic session 12A: Split manufacturing — IARPA's TIC program

Ramesh Karri, Dean Collins, 2014, 2014 IEEE 32nd VLSI Test Symposium (VTS).

BRAIN: BehavioR Based Adaptive Intrusion Detection in Networks: Using Hardware Performance Counters to Detect DDoS Attacks

Ramesh Karri, Xueyang Wang, Sateesh Addepalli, 2016, 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

A framework for fault-tolerant microarchitecture synthesis

Ramesh Karri, A. Orailoglu, A. Orailoglu, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

Introspection: a low overhead binding technique during self-diagnosing microarchitecture synthesis

Ramesh Karri, Balakrishnan Iyer, B. Iyer, 1996, 33rd Design Automation Conference Proceedings, 1996.

HACK3D: Evaluating Cybersecurity of Additive Manufacturing by Crowdsourcing pdf

Ramesh Karri, Chenglu Jin, Nikhil Gupta, 2020, ArXiv.

Guest Editors' Introduction: Online VLSI Testing

Ramesh Karri, Michael Nicolaidis, M. Nicolaidis, 1998, IEEE Design & Test of Computers.

Deep Packet Field Extraction Engine (DPFEE): A pre-processor for network intrusion detection and denial-of-service detection systems

Ramesh Karri, Sateesh Addepalli, Vinayaka Jyothi, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Logic Level Fault Tolerance Approaches Targeting Nanoelectronics PLAs

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2007, 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07).

MAGIC: Malicious Aging in Circuits/Cores

Ramesh Karri, Ozgur Sinanoglu, Xueyang Wang, 2015, TACO.

Black-Hat High-Level Synthesis: Myth or Reality?

Ramesh Karri, Francesco Regazzoni, Christian Pilato, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Attacks and Defenses for JTAG

Ramesh Karri, Kurt Rosenfeld, R. Karri, 2010, IEEE Design & Test of Computers.

Fault tolerant nanoelectronic processor architectures

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Issues in developing a parametrized VHDL library for on-line testing

Ramesh Karri, Charles E. Stroud, M. Ding, 1998 .

Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit RC6 block cipher

Ramesh Karri, Kaijie Wu, Piyush Mishra, 2003, Microelectron. J..

Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design

Ramesh Karri, Kaijie Wu, Nikhil Joshi, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Belling the CAD: Toward Security-Centric Electronic System Design

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Nanofabric topologies and reconfiguration algorithms to support dynamically adaptive fault tolerance

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2006, 24th IEEE VLSI Test Symposium.

High-Level Synthesis of Benevolent Trojans

Ramesh Karri, Francesco Regazzoni, Christian Pilato, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

PREEMPT: PReempting Malware by Examining Embedded Processor Traces

Ramesh Karri, Krishnendu Chakrabarty, Rana Elnaggar, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Towards Nanoelectronics Processor Architectures

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2007, J. Electron. Test..

Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices pdf

Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, 2018, IEEE Transactions on Emerging Topics in Computing.

Can Algorithm Diversity in Stream Cipher Implementation Thwart (Natural and) Malicious Faults?

Ramesh Karri, Chi Zhang, Chenglu Jin, 2016, IEEE Transactions on Emerging Topics in Computing.

Security Trade-Offs in Microfluidic Routing Fabrics

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Design trade-offs during fault-tolerant data path synthesis

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1999 .

Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures

Sachhidh Kannan, Ramesh Karri, Ozgur Sinanoglu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On-line error detection and BIST for the AES encryption algorithm with different S-box implementations

Ramesh Karri, Michael Gössel, Vitalij Ocheretnij, 2005, 11th IEEE International On-Line Testing Symposium.

Securing IJTAG against data-integrity attacks

Ramesh Karri, Krishnendu Chakrabarty, Rana Elnaggar, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Towards a comprehensive and systematic classification of hardware Trojans

Jeyavijayan Rajendran, Ramesh Karri, Jorge Jimenez, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Process-aware side channel monitoring for embedded control system security

Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, 2017, 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Micropreemption synthesis: an enabling mechanism for multitask VLSI systems

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Compact hardware architectures for BLAKE and LAKE hash functions

Ramesh Karri, Jianzhou Li, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Synthesis of fault-tolerant and real-time microarchitectures

Ramesh Karri, Alex Orailoglu, 1994, J. Syst. Softw..

Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Is split manufacturing secure?

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit symmetric block ciphers

Ramesh Karri, Kaijie Wu, Piyush Mishra, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Algorithm level re-computing with shifted operands-a register transfer level concurrent error detection technique

Ramesh Karri, Kaijie Wu, R. Karri, 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

Security implications of cyberphysical digital microfluidic biochips

Mohamed Ibrahim, Ramesh Karri, Ozgur Sinanoglu, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Cybersecurity of Smart Electric Vehicle Charging: A Power Grid Perspective

Ramesh Karri, Hrvoje Pandžić, Yury Dvorkin, 2020, IEEE Access.

Algorithm level recomputing using allocation diversity: a registertransfer level approach to time redundancy-based concurrent errordetection

Ramesh Karri, Kaijie Wu, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Run-time detection of hardware Trojans: The processor protection unit

Ramesh Karri, David Hély, Jeremy Dubeuf, 2013, 2013 18th IEEE European Test Symposium (ETS).

High-level synthesis of fault-tolerant ASICs

Ramesh Karri, Alex Orailoglu, R. Karri, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Scan-based attacks on linear feedback shift register based stream ciphers

Yu Liu, Ramesh Karri, Kaijie Wu, 2011, TODE.

Building Trustworthy Systems Using Untrusted Components: A High-Level Synthesis Approach

Ramesh Karri, Ozgur Sinanoglu, Jeyavijayan J. V. Rajendran, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Idle cycles based concurrent error detection of RC6 encryption, [FPGAs]

Ramesh Karri, Kaijie Wu, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits

Robert Wille, Ramesh Karri, Alwin Zulehner, 2019, ACM J. Emerg. Technol. Comput. Syst..

Mitigation: Tamper-Mitigating Routing Fabrics

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2020 .

Ramesh Karri, Nilanjan Mukherjee, T Chakrabarti, 1999 .

Explaining and Interpreting Machine Learning CAD Decisions: An IC Testing Case Study

Ramesh Karri, Benjamin Tan, Farshad Khorrami, 2020, MLCAD.

Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges

Mark Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri, 2011, Computer.

Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling

Jeyavijayan Rajendran, Ramesh Karri, Chen Liu, 2013, 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Fault tolerant arithmetic with applications in nanotechnology based systems

Ramesh Karri, Wenjing Rao, Alex Orailoglu, 2004 .

On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks

Ramesh Karri, Jerry Backer, David Hély, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Low cost concurrent error detection for the advanced encryption standard

Ramesh Karri, Michael Gössel, Kaijie Wu, 2004, 2004 International Conferce on Test.

Power Optimization for Universal Hash Function Data Path Using Divide-and-Concatenate Technique

Ramesh Karri, Bo Yang, R. Karri, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Methodology for behavioral synthesis-based algorithm-level design space exploration: DCT case study

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1997, DAC.

Improving Tolerance to Variations in Memristor-Based Applications Using Parallel Memristors

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2015, IEEE Transactions on Computers.

An Approach to Tolerate Process Related Variations in Memristor-Based Applications

Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose, 2011, 2011 24th Internatioal Conference on VLSI Design.

A method for error detection in the cryptographic transforming binary data and circuitry

Ramesh Karri, Michael Prof. Dr. Gössel, Grigori Kouznetsov, 2002 .

On design vulnerability analysis and trust benchmarks development

Mark Mohammad Tehranipoor, Ramesh Karri, Hassan Salmani, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Ramesh Karri, Kaijie Wu, Nikhil Joshi, 2007, Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2007).

Optimizing the Energy Consumed by Secure Wireless Sessions – Wireless Transport Layer Security Case Study

Ramesh Karri, Piyush Mishra, 2003, Mob. Networks Appl..

Boole - a hardware description language

Ramesh Karri, Tv Gopal, Prk Murti, 1988 .

Automatic synthesis of application-specific programmable processors

Ramesh Karri, Kyosun Kim, 1998 .

Security Against Data-Sniffing and Alteration Attacks in IJTAG

Ramesh Karri, Rana Elnaggar, Krishnendu Chakrabarty, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Area-EfficientFault Detection During Self-Recovering Microarchitecture Synthesis

Ramesh Karri, Alex Orailoglu, 1994, 31st Design Automation Conference.

Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Approximating the age of RF/analog circuits through re-characterization and statistical estimation

Ramesh Karri, Ozgur Sinanoglu, Sule Ozev, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Fault tolerant quantum cellular array (QCA) design using triple modular redundancy with shifted operands

Tongquan Wei, Ramesh Karri, Kaijie Wu, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Ramesh Karri, Kaijie Wu, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Nano, quantum, and molecular computing: are we ready for the validation and test challenges?

Seth Copen Goldstein, Sandeep K. Shukla, Kaustav Banerjee, 2003, Eighth IEEE International High-Level Design Validation and Test Workshop.

Multi-Tenant FPGA-based Reconfigurable Systems: Attacks and Defenses

Ramesh Karri, Krishnendu Chakrabarty, Rana Elnaggar, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Exploiting Small Leakages in Masks to Turn a Second-Order Attack into a First-Order Attack and Improved Rotating Substitution Box Masking with Linear Code Cosets

Claude Carlet, Sylvain Guilley, Ramesh Karri, 2015, TheScientificWorldJournal.

A Primer on Hardware Security: Models, Methods, and Metrics

Ramesh Karri, Farinaz Koushanfar, Masoud Rostami, 2014, Proceedings of the IEEE.

Toward Secure and Trustworthy Cyberphysical Microfluidic Biochips

Mohamed Ibrahim, Ramesh Karri, Krishnendu Chakrabarty, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Tutorial 1

Ramesh Karri, Ozgur Sinanoglu, Peilin Song, 2006, 2006 Proceedings of the First Mobile Computing and Wireless Communication International Conference.

Boolean Circuit Camouflage: Cryptographic Models, Limitations, Provable Results and a Random Oracle Realization

Nasir D. Memon, Giovanni Di Crescenzo, Jeyavijayan Rajendran, 2017, ASHES@CCS.

TAO: Techniques for Algorithm-Level Obfuscation during High-Level Synthesis

Ramesh Karri, Siddharth Garg, Francesco Regazzoni, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Process-Aware Side Channel Shaping and Watermarking for Cyber-Physical Systems

Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, 2018, 2018 Annual American Control Conference (ACC).

Configurable spare processors: a new approach to system level fault-tolerance

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1996, Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection technique

Ramesh Karri, Kaijie Wu, R. Karri, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Physical Unclonable Functions and Intellectual Property Protection Techniques

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2017 .

Detection, diagnosis, and repair of faults in memristor-based memories

Sachhidh Kannan, Ramesh Karri, Ozgur Sinanoglu, 2014, 2014 IEEE 32nd VLSI Test Symposium (VTS).

Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Hardware Trojan detection using path delay order encoding with process variation tolerance

Ramesh Karri, Kaijie Wu, Xiaotong Cui, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Trustworthy Hardware: Identifying and Classifying Hardware Trojans

Mark Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri, 2010, Computer.

Securing Processors Against Insider Attacks: A Circuit-Microarchitecture Co-Design Approach

Jeyavijayan Rajendran, Ramesh Karri, Mohamed Zahran, 2013, IEEE Design & Test.

Process-Aware Covert Channels Using Physical Instrumentation in Cyber-Physical Systems

Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, 2018, IEEE Transactions on Information Forensics and Security.

RELSYN: a tool for synthesis of reliable application specific multiprocessors

Ramesh Karri, A. Dasgupta, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Simulation and analysis of negative-bias temperature instability aging on power analysis attacks

Ramesh Karri, Francesco Regazzoni, Chenglu Jin, 2015, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST).

Hardware and embedded security in the context of internet of things

Ramesh Karri, Sateesh Addepalli, Arun K. Kanuparthi, 2013, CyCAR '13.

High-level synthesis for security and trust

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

A Theoretical Study of Hardware Performance Counters-Based Malware Detection

Ramesh Karri, Farshad Khorrami, Prashanth Krishnamurthy, 2020, IEEE Transactions on Information Forensics and Security.

Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor Memories

Sachhidh Kannan, Ramesh Karri, Ozgur Sinanoglu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Hardware security strategies exploiting nanoelectronic circuits

Miodrag Potkonjak, Jeyavijayan Rajendran, Ramesh Karri, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

A constant array multiplier core generator with dynamic partial evaluation architecture selection (abstract only)

Ramesh Karri, Bo Yang, Nikhil Joshi, 2005, FPGA '05.

SLICED: Slide-based concurrent error detection technique for symmetric block ciphers

Jeyavijayan Rajendran, Ramesh Karri, Hetal Borad, 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

Is Register Transfer Level Locking Secure?

Ramesh Karri, Siddharth Garg, Christian Pilato, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

NNoculation: Broad Spectrum and Targeted Treatment of Backdoored DNNs pdf

Ramesh Karri, Brendan Dolan-Gavitt, Kang Liu, 2020, ArXiv.

Architecture Support for Dynamic Integrity Checking

Ramesh Karri, Mohamed Zahran, Arun K. Kanuparthi, 2012, IEEE Transactions on Information Forensics and Security.

Public Plug-in Electric Vehicles + Grid Data: Is a New Cyberattack Vector Viable?

Ramesh Karri, Yury Dvorkin, Samrat Acharya, 2019, IEEE Transactions on Smart Grid.

Toward Hardware-Based IP Vulnerability Detection and Post-Deployment Patching in Systems-on-Chip

Ramesh Karri, Rana Elnaggar, Benjamin Tan, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Security analysis of logic obfuscation

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2012, DAC Design Automation Conference 2012.

Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling

Jeyavijayan Rajendran, Ramesh Karri, Chen Liu, 2013, IEEE Transactions on Emerging Topics in Computing.

Algorithm level recomputing with allocation diversity: a register transfer level time redundancy based concurrent error detection technique

Ramesh Karri, Kaijie Wu, 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

Securing Hardware Accelerators: A New Challenge for High-Level Synthesis

Ramesh Karri, Siddharth Garg, Kaijie Wu, 2018, IEEE Embedded Systems Letters.

Fingerprinting Field Programmable Gate Arrays

Ramesh Karri, Vinayaka Jyothi, Richard Stern, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Bio-Protocol Watermarking on Digital Microfluidic Biochips

Ramesh Karri, Krishnendu Chakrabarty, Sukanta Bhattacharjee, 2019, IEEE Transactions on Information Forensics and Security.

Algorithm level re-computing-a register transfer level concurrent error detection technique

Ramesh Karri, Kaijie Wu, 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

Security challenges during VLSI test

Ramesh Karri, David Hely, Kurt Rosenfeld, 2011, 2011 IEEE 9th International New Circuits and systems conference.

Divide-and-concatenate: an architecture level optimization technique for universal hash functions

Ramesh Karri, Bo Yang, David A. McGrew, 2004, Proceedings. 41st Design Automation Conference, 2004..

A high-performance, low-overhead microarchitecture for secure program execution

Ramesh Karri, Sateesh Addepalli, Arun K. Kanuparthi, 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

Power optimization using divide-and-conquer techniques for minimization of the number of operations

Miodrag Potkonjak, Ramesh Karri, Inki Hong, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Security Assessment of Microfluidic Immunoassays

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2019, COINS.

A Secure Design-for-Test Architecture to Thwart Attacks Throughout The Life Cycle of SoCs

Ramesh Karri, Ozgur Sinanoglu, Subidh Ali, 2015, ISCAS 2015.

TAO: Techniques for Algorithm-Level Obfuscation during High-Level Synthesis

Ramesh Karri, Siddharth Garg, Francesco Regazzoni, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Maximizing the fault-tolerance of application specific programmable signal processors

Miodrag Potkonjak, Ramesh Karri, Kyosun Kim, 1996, VLSI Signal Processing, IX.

Can flexible, domain specific programmable logic prevent IP theft?

Ramesh Karri, Kaijie Wu, Xiaotong Cui, 2016, 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Fault Attacks on AES and Their Countermeasures

Debdeep Mukhopadhyay, Ramesh Karri, Subidh Ali, 2016 .

Automatic systems of fault-tolerant vlsi systems

Ramesh Karri, Alex Orailoglu, 1993 .

Hot-carrier reliability enhancement via input reordering and transistor sizing

Ramesh Karri, Aurobindo Dasgupta, R. Karri, 1996, DAC '96.

Bias Busters: Robustifying DL-based Lithographic Hotspot Detectors Against Backdooring Attacks pdf

Ramesh Karri, Yiorgos Makris, Kang Liu, 2020, ArXiv.

Towards a New Thermal Monitoring Based Framework for Embedded CPS Device Security

Ramesh Karri, Jorg Henkel, Farshad Khorrami, 2020 .

TAINT: Tool for Automated INsertion of Trojans

Ramesh Karri, Prashanth Krishnamurthy, Farshad Khorrami, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Hardware implementation of a signaling protocol

Ramesh Karri, Malathi Veeraraghavan, Haobo Wang, 2002, SPIE ITCom.

Formal Security Verification of Third Party Intellectual Property Cores for Information Leakage

Jeyavijayan Rajendran, Ramesh Karri, Vivekananda Vedula, 2016, 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

Hardware Performance Counters: Ready-Made vs Tailor-Made

Ramesh Karri, Kanad Basu, Anushree Mahapatra, 2021, ACM Trans. Embed. Comput. Syst..

Asleep at the Keyboard? Assessing the Security of GitHub Copilot’s Code Contributions

Ramesh Karri, Brendan Dolan-Gavitt, Hammond Pearce, 2021, 2022 IEEE Symposium on Security and Privacy (SP).

Can OpenAI Codex and Other Large Language Models Help Us Fix Security Bugs? pdf

Ramesh Karri, Brendan Dolan-Gavitt, Hammond Pearce, 2021, ArXiv.

Runtime Malware Detection Using Embedded Trace Buffers

Ramesh Karri, Krishnendu Chakrabarty, Rana Elnaggar, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition

Jason Cong, Peng Wei, Ramesh Karri, 2021, 2021 Formal Methods in Computer Aided Design (FMCAD).

Cyber security threat modeling in the AEC industry: An example for the commissioning of the built environment

Ramesh Karri, Bharadwaj R. K. Mantha, Borja García de Soto, 2021 .

HOST: HLS Obfuscations against SMT ATtack

Ramesh Karri, Chandan Karfa, Ramanuj Chouksey, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Thwarting Bio-IP Theft Through Dummy-Valve-Based Obfuscation

Ramesh Karri, Krishnendu Chakrabarty, Yong-Ak Song, 2021, IEEE Transactions on Information Forensics and Security.

Fortifying RTL Locking Against Oracle-Less (Untrusted Foundry) and Oracle-Guided Attacks

Ramesh Karri, Ozgur Sinanoglu, Siddharth Garg, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

FLAW3D: A Trojan-Based Cyber Attack on the Physical Outcomes of Additive Manufacturing pdf

Ramesh Karri, Hammond Pearce, Kaushik Yanamandra, 2021, IEEE/ASME Transactions on Mechatronics.

Cyber Insurance Against Cyberattacks on Electric Vehicle Charging Stations pdf

Ramesh Karri, Charalambos Konstantinou, Samrat Acharya, 2021, IEEE Transactions on Smart Grid.

Hack3D: Crowdsourcing the Assessment of Cybersecurity in Digital Manufacturing

Ramesh Karri, Gary Mac, Michael Linares, 2021, Computer.

Security Closure of Physical Layouts ICCAD Special Session Paper

Ramesh Karri, Ozgur Sinanoglu, Johann Knechtel, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

HOLL: Program Synthesis for Higher OrderLogic Locking

Ramesh Karri, Gourav Takhar, Christian Pilato, 2022, TACAS.

An Empirical Cybersecurity Evaluation of GitHub Copilot's Code Contributions pdf

Ramesh Karri, Brendan Dolan-Gavitt, Hammond Pearce, 2021, ArXiv.

OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis pdf

Ramesh Karri, Siddharth Garg, Animesh Basak Chowdhury, 2021, ArXiv.

Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction pdf

Ramesh Karri, Pierre-Emmanuel Gaillardon, Christian Pilato, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

NNoculation: Catching BadNets in the Wild

Ramesh Karri, Siddharth Garg, Brendan Dolan-Gavitt, 2020, AISec@CCS.

Exploring eFPGA-based Redaction for IP Protection

Ramesh Karri, Pierre-Emmanuel Gaillardon, Christian Pilato, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method

Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg, 2021, 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC).

Securing Biochemical Samples Using Molecular Barcoding on Digital Microfluidic Biochips*

Ramesh Karri, Krishnendu Chakrabarty, Tung-Che Liang, 2021, 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Special Session: Machine Learning for Semiconductor Test and Reliability

Sheldon X.-D. Tan, Ramesh Karri, Ilia Polian, 2021, 2021 IEEE 39th VLSI Test Symposium (VTS).

Robust Deep Learning for IC Test Problems

Ramesh Karri, Siddharth Garg, Animesh Basak Chowdhury, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP

Ankur Srivastava, Gang Qu, Ramesh Karri, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

Efficient Hardware Implementation of PQC Primitives and PQC algorithms Using High-Level Synthesis

Ramesh Karri, Deepraj Soni, R. Karri, 2021, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

On the Optimization of Behavioral Logic Locking for High-Level Synthesis pdf

Ramesh Karri, Siddharth Garg, Donatella Sciuto, 2021, ArXiv.

Causative Cyberattacks on Online Learning-Based Automated Demand Response Systems

Ramesh Karri, Samrat Acharya, Yury Dvorkin, 2021, IEEE Transactions on Smart Grid.

Vertical IP Protection of the Next-Generation Devices: Quo Vadis?

Rolf Drechsler, Ramesh Karri, Siddharth Garg, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Fault-tolerant vlsi systems

Ramesh Karri, R. Karri, 1999 .

Towards 10-100 Gbps crypotographic architectures

Ramesh Karri, Kaijie Wu, R. Karri, 2002 .

A Hardware Evaluation Study of NIST Post-Quantum Cryptographic Signature schemes

Ramesh Karri, Deepraj Soni, Kanad Basu, 2019 .

Verifying Physical Trustworthiness of ICs and Systems

Ramesh Karri, Kurt Rosenfeld, 2009 .

Special session: emerging (Un-)reliability based security threats and mitigations for embedded systems

Jörg Henkel, Ramesh Karri, Prashanth Krishnamurthy, 2017, 2017 International Conference on Compilers, Architectures and Synthesis For Embedded Systems (CASES).