Mario Fiallos Aguilar

Polynomial evaluation on a massively parallel and multipipelined architecture

Mario Fiallos Aguilar, 1994 .

On the Simulation of Pipelining of Fully Digit On-Line Floating-Point Adder Networks on Massively Parallel Computers

Mario Fiallos Aguilar, Jean Duprat, 1992, CONPAR.

Anti-doping: an approach for grid integrity verification

Rossana M. de Castro Andrade, Mario Fiallos Aguilar, Paulo Benicio Melo de Sousa, 2005, Advanced Industrial Conference on Telecommunications/Service Assurance with Partial and Intermittent Resources Conference/E-Learning on Telecommunications Workshop (AICT/SAPIR/ELETE'05).

Parallel simulation of heterogeneous arithmetic units networks and high precision dot products

Mario Fiallos Aguilar, Jean Duprat, 1994, 27th Annual Simulation Symposium.

Towards a High Precision Massively Parallel Computer

Mario Fiallos Aguilar, Jean Duprat, J. Duprat, 1994, PARLE.

Delays of on-line floating point operators in borrow-save representation

Jean-Michel Muller, Hong-Jin Yeh, Mario Fiallos Aguilar, 1991, Algorithms and Parallel VLSI Architectures.