P. Favia

发表

Dynamics of fracturing saturated porous media and self-organization of rupture pdf

Bernhard A. Schrefler, F. Hussain, C. Peruzzo, 2019, European Journal of Mechanics - A/Solids.

Reliability of AlGaN/GaN HEMTs: Permanent leakage current increase and output current drop

Denis Marcon, Stefaan Decoutere, Xuanwu Kang, 2012, Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

High-mobility Si1−xGex-channel PFETs: Layout dependence and enhanced scalability, demonstrating 90% performance boost at narrow widths

C. Ortolland, L. Witters, H. Bender, 2010, 2010 Symposium on VLSI Technology.

0.5 nm EOT low leakage ALD SrTiO3 on TiN MIM capacitors for DRAM applications

S. Van Elshocht, B. Kaczer, H. Bender, 2008, 2008 IEEE International Electron Devices Meeting.

Strained Germanium quantum well pMOS FinFETs fabricated on in situ phosphorus-doped SiGe strain relaxed buffer layers using a replacement Fin process

L. Witters, N. Waldron, N. Collaert, 2013, 2013 IEEE International Electron Devices Meeting.

Beyond interface: The impact of oxide border traps on InGaAs and Ge n-MOSFETs

R. Degraeve, D. Lin, N. Collaert, 2012, 2012 International Electron Devices Meeting.

Enabling 3X nm DRAM: Record low leakage 0.4 nm EOT MIM capacitors with novel stack engineering

B. Kaczer, B. Govoreanu, H. Bender, 2010, 2010 International Electron Devices Meeting.

Performance and electrostatic improvement by high-pressure anneal on Si-passivated strained Ge pFinFET and gate all around devices with superior NBTI reliability

L. Witters, D. Mocuta, N. Collaert, 2017, 2017 Symposium on VLSI Technology.

Metal Gate Technology using a Dy2O3 Dielectric Cap Approach for multiple-VT in NMOS FinFETs

S. Van Elshocht, B. Kaczer, P. Lehnen, 2007, 2007 IEEE International SOI Conference.

Strained germanium quantum well p-FinFETs fabricated on 45nm Fin pitch using replacement channel, replacement metal gate and germanide-free local interconnect

L. Witters, D. Mocuta, N. Collaert, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

15nm-WFIN high-performance low-defectivity strained-germanium pFinFETs with low temperature STI-last process

A. Brand, P. Eyben, L. Witters, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

1mA/um-ION strained SiGe45%-IFQW pFETs with raised and embedded S/D

P. Eyben, G. Hellings, L. Witters, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

L. Witters, N. Waldron, D. Mocuta, 2017, IEEE Transactions on Electron Devices.

Reliability of Strained-Si Devices With Post-Oxide-Deposition Strain Introduction

E. San Andres, R. Degraeve, B. Kaczer, 2008, IEEE Transactions on Electron Devices.

Ge nFET with high electron mobility and superior PBTI reliability enabled by monolayer-Si surface passivation and La-induced interface dipole formation

L. Witters, N. Collaert, S. Sioncke, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Optimized ultra-low thermal budget process flow for advanced High-K / Metal gate first CMOS using laser-annealing technology

C. Ortolland, A. Akheyar, T. Chiarella, 2006, 2009 Symposium on VLSI Technology.

Stress Techniques in Advanced Transistor Architectures: Bulk FinFETs and Implant-Free Quantum Well Transistors

Naoto Horiguchi, Geert Hellings, Jerome Mitard, 2012 .

Gate-last vs. gate-first technology for aggressively scaled EOT logic/RF CMOS

H. Bender, G. Eneman, N. Horiguchi, 2011, 2011 Symposium on VLSI Technology - Digest of Technical Papers.