Brian Baldwin

Reconfigurable Hardware Implementation of Arithmetic Modulo Minimal Redundancy Cyclotomic Primes for ECC

William P. Marnane, Brian Baldwin, Robert Granger, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

A Hardware Wrapper for the SHA-3 Hash Algorithms

William P. Marnane, Máire O'Neill, Liang Lu, 2010, IACR Cryptol. ePrint Arch..

Yet Another SHA-3 Round 3 FPGA Results Paper

William P. Marnane, Brian Baldwin, 2012, IACR Cryptol. ePrint Arch..

Rethinking the ePortfolio: A Pilot Study to Determine the Impact Web 2.0 Tools on Reflection and Teacher Development

Brian Baldwin, Katie Alaniz, Maggie Redling, 2012 .

Fault injection platform for block ciphers

William P. Marnane, Michael Tunstall, Brian Baldwin, 2008 .

Recommendations for Fire Station Design

Brian Baldwin, 1999 .

Co-\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$Z$$\end{document} ECC scalar multiplications for hardware, software

William P. Marnane, Brian Baldwin, Mark Hamilton, 2012, Journal of Cryptographic Engineering.

The Certicom Challenges ECC2-X

Tanja Lange, Peter Schwabe, Tim Güneysu, 2009, IACR Cryptol. ePrint Arch..

A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem

William P. Marnane, Gary McGuire, Brian Baldwin, 2009, ARC.

FPGA Implementations of SHA-3 Candidates: CubeHash, Grøstl, LANE, Shabal and Spectral Hash

William P. Marnane, Brian Baldwin, Andrew Byrne, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations

William P. Marnane, Brian Baldwin, 2009, IACR Cryptol. ePrint Arch..