Y. Leblebici

发表

Subthreshold Source-Coupled Logic Circuits for Ultra-Low-Power Applications

A. Tajalli, E.J. Brauer, Y. Leblebici, 2008, IEEE Journal of Solid-State Circuits.

Fault tolerance of feed-forward artificial neural network architectures targeting nano-scale implementations

Y. Leblebici, A. Schmid, M. Vural, 2007, 2007 50th Midwest Symposium on Circuits and Systems.

Fostering the reuse and collaborative development of models in the AMS SoC design process

Y. Leblebici, T. Mahne, A. Vachoux, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

Case study of fault-tolerant architectures for 90nm CMOS crythographic cores

Y. Leblebici, A. Schmid, M. Gabrani, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

Modular realization of threshold logic gates for high performance digital signal processing applications

Y. Leblebici, F.K. Gurkaynak, 1998, Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372).

Fault-tolerant logic gates using neuromorphic CMOS Circuits

Y. Leblebici, Y. Amemiya, A. Schmid, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

A 4-channel 2.5Gb/s/channel 66dB/spl Omega/ inductorless transimpedance amplifier [optical receiver applications]

Y. Leblebici, P. Muller, M.K. Emsley, 2004, Proceedings of the 30th European Solid-State Circuits Conference.

Tri-state buffer/bus driver circuits in MOS current-mode logic

Y. Leblebici, S. Badel, Y. Leblebici, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

A multichannel 3.5mW/Gbps/channel gated oscillator based CDR in a 0.18/spl mu/m digital CMOS technology

M. Atarodi, Y. Leblebici, A. Tajalli, 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

Development of a bond graph based model of computation for SystemC-AMS

Y. Leblebici, A. Vachoux, T. Maehne, 2008, 2008 Ph.D. Research in Microelectronics and Electronics.

An inductorless peaking technique applied to MOS current-mode logic gates

Y. Leblebici, S. Badel, 2004, Proceedings Norchip Conference, 2004..

Fault-tolerant PLA-style circuit design for failure-prone nanometer CMOS and quantum device technologies

Y. Leblebici, A. Schmid, 2004, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541).

Via-Programmable Structured ASIC Fabric Based on MCML Cells: Design Flow and Implementation

E.J. Brauer, Y. Leblebici, I. Hatirnaz, 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.

Real-time implementation of Gaussian image blending in a spherical light field camera

Y. Leblebici, A. Schmid, V. Popovic, 2013, 2013 IEEE International Conference on Industrial Technology (ICIT).

A Power-Efficient Clock and Data Recovery Circuit in 0.18 $\mu{\hbox {m}}$ CMOS Technology for Multi-Channel Short-Haul Optical Data Communication

A. Tajalli, Y. Leblebici, P. Muller, 2007, IEEE Journal of Solid-State Circuits.

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

Y. Leblebici, E. Vittoz, Z.T. Deniz, 2006, IEEE Journal of Solid-State Circuits.

Nano-wires for room temperature operated hybrid CMOS-NANO integrated circuits

S. Mahapatra, M.J. Declercq, Y. Leblebici, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

Multi-chip implementation of a high-speed sorting engine based on rank-ordering

Y. Leblebici, I. Hatirnaz, O. Kalkan, 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

Analysis of reliability in nanoscale circuits and systems based on a-priori statistical fault-modeling methodology

Y. Leblebici, A. Schmid, M. Stanisavljevic, 2005, 48th Midwest Symposium on Circuits and Systems, 2005..

A compact 31-input programmable majority gate based on capacitive threshold logic

Y. Leblebici, D. Mlynek, F.K. Gurkaynak, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Ambipolar Gate-Controllable SiNW FETs for Configurable Logic Circuits With Improved Expressive Capability

G. De Micheli, Y. Leblebici, D. Sacchetto, 2012, IEEE Electron Device Letters.

A 60 Gb/s 1.9 pJ/bit NRZ optical-receiver with low latency digital CDR in 14nm CMOS FinFET

T. Toifl, C. Menolfi, L. Kull, 2017, 2017 Symposium on VLSI Circuits.

Regular array of nanometer-scale devices performing logic operations with fault-tolerance capability

Y. Leblebici, A. Schmid, 2004, 4th IEEE Conference on Nanotechnology, 2004..

Design of completion detection circuits for self-timed systems operating in subthreshold regime

Y. Leblebici, O.C. Akgun, E.A. Vittoz, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

Providing QoS to connection-less packet-switched NoC by implementing DiffServ functionalities

Y. Leblebici, P. Ienne, Nuria Pazos Escudero, 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

Optimization of the Averaging Reliability Technique Using Low Redundancy Factors for Nanoscale Technologies

Y. Leblebici, A. Schmid, M. Stanisavljevic, 2009, IEEE Transactions on Nanotechnology.

Hardware implementation of an omnidirectional camerawith real-time 3D imaging capability

Laurent Jacques, Alexandre Schmid, Y. Leblebici, 2011, 2011 3DTV Conference: The True Vision - Capture, Transmission and Display of 3D Video (3DTV-CON).

Towards a unified top-down design flow for fully differential logic blocks with improved speed and noise immunity

Y. Leblebici, I. Hatirnaz, S. Badel, 2005, Research in Microelectronics and Electronics, 2005 PhD.

Surface potential compact model for embedded flash devices oriented to IC memory design

Y. Leblebici, D. Rideau, A. Schmid, 2012, 2012 13th International Conference on Ultimate Integration on Silicon (ULIS).

Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)

Y. Leblebici, R. M. Shelby, C. di Nolfo, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Design and Integration of All-Silicon Fiber-Optic Receivers for Multi-Gigabit Chip-to-Chip Links

M. Atarodi, Y. Leblebici, M.K. Emsley, 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept

A. Tajalli, E.J. Brauer, Y. Leblebici, 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

A power-efficient LVDS driver circuit in 0.18-μm CMOS technology

Y. Leblebici, A. alii, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

A highly fault tolerant PLA architecture for realization of Boolean functions using failure-prone nanometer-scale device technologies

Y. Leblebici, A. Schmid, 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

A. Tajalli, Y. Leblebici, M. Beikahmadi, 2008, 2008 NORCHIP.

A modular pipelined macro-block for high-speed digital filtering applications

Y. Leblebici, F.K. Gurkaynak, 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

Applications of Multi-Terminal Memristive Devices: A Review

G. De Micheli, Y. Leblebici, S. Carrara, 2013, IEEE Circuits and Systems Magazine.

A Slew Controlled LVDS Output Driver Circuit in 0.18 $\mu$m CMOS Technology

A. Tajalli, Y. Leblebici, 2009, IEEE Journal of Solid-State Circuits.

Die-level TSV fabrication platform for CMOS-MEMS integration

Y. Leblebici, C. Guiducci, M. Zervas, 2011, 2011 16th International Solid-State Sensors, Actuators and Microsystems Conference.

A CMOS-compatible chip-to-chip 3D integration platform

Y. Leblebici, C. Guiducci, M. Zervas, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

MEMS sensor array platform integrated with CMOS based optical readout

Y. Leblebici, H. Urey, S. Olcer, 2013, 2013 IEEE 26th International Conference on Micro Electro Mechanical Systems (MEMS).

A new logic family based on hybrid MOSFET-polysilicon nanowires

Y. Leblebici, V. Pott, A. Schmid, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Design and integration of a bimorph thermal microactuator with electrostatically actuated microtweezers

Y. Leblebici, M. Zervas, M. Yilmaz, 2008, 2008 Ph.D. Research in Microelectronics and Electronics.

A 5 . 9 mW / Gb / s 7 Gb / s / pin 8-Lane Single-Ended RX with Crosstalk Cancellation Scheme using a XCTLE and 56-tap XDFE in 32 nm SOI CMOS

T. Toifl, C. Menolfi, L. Kull, 2016 .

Modeling Stressed MOS Oxides Using a Multiphonon-Assisted Quantum Approach—Part II: Transient Effects

A. Zaka, Y. Leblebici, D. Rideau, 2012, IEEE Transactions on Electron Devices.

Neuronal spike event generation by memristors

Sangho Shin, Y. Leblebici, D. Sacchetto, 2012, 2012 13th International Workshop on Cellular Nanoscale Networks and their Applications.

Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs

G. De Micheli, Y. Leblebici, S. Frache, 2012, 2012 International Electron Devices Meeting.

Modeling Stressed MOS Oxides Using a Multiphonon-Assisted Quantum Approach—Part I: Impedance Analysis

A. Zaka, Y. Leblebici, D. Rideau, 2012, IEEE Transactions on Electron Devices.

Ambipolar Si nanowire field effect transistors for low current and temperature sensing

G. De Micheli, Y. Leblebici, D. Sacchetto, 2011, 2011 16th International Solid-State Sensors, Actuators and Microsystems Conference.

Realization of high-efficiency 10 GHz bandwidth silicon photodetector arrays for fully integrated optical data communication interfaces

Y. Leblebici, M.K. Emsley, P. Muller, 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

Transient simulation of resonant cavity enhanced heterojunction photodiodes

H. Morkoc, Y. Leblebici, S.M. Kang, 1992, IEEE Photonics Technology Letters.

Real-time high-sensitivity impedance measurement interface for tethered BLM biosensor arrays

L. Benini, G. De Micheli, Y. Leblebici, 2008, 2008 IEEE Sensors.