Lu-An Chen

发表

Design of modified ESD protection structure with low-trigger and high-holding voltage in embedded high voltage CMOS process

Tien-Hao Tang, Kuan-Cheng Su, Tai-Hsiang Lai, 2011, 2011 International Reliability Physics Symposium.

The modified P+ electrode layout schemes to enhance esd robustness of SCR structure for PMIC applications

Tien-Hao Tang, Kuan-Cheng Su, Chang-Tzu Wang, 2011, 2011 International Reliability Physics Symposium.

Lower trigger voltage design for ESD protection device applied in PMIC application

Tien-Hao Tang, Kuan-Cheng Su, Yi-Ning He, 2014, 2014 IEEE International Reliability Physics Symposium.

Electric-Field Enhancement of a Gate-All-Around Nanowire Thin-Film Transistor Memory

Jeng-Tzong Sheu, Lu-An Chen, J. Sheu, 2010, IEEE Electron Device Letters.