Wayne Wei-Ming Dai

发表

Routability Analysis of Bit-Serial Pipeline Datapaths (Special Section on VLSI Design and CAD Algorithms)

Tsuyoshi Isshiki, Hiroaki Kunieda, Wayne Wei-Ming Dai, 1997 .

A novel dimension reduction technique for the capacitance extraction of 3D VLSI interconnects

Wei Hong, Zhenhai Zhu, Hao Ji, 1996, Proceedings of International Conference on Computer Aided Design.

PERFORMANCE DRIVEN LAYOUT FOR THIN-FILM MULTICHIP MODULES

Wayne Wei-Ming Dai, 1991 .

Bit-serial pipeline synthesis for multi-FPGA systems with C++ design capture

Tsuyoshi Isshiki, Wayne Wei-Ming Dai, 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.

A Method for Generation Random Circuits and Its Application to Routability Measurement

Wayne Wei-Ming Dai, Joel Darnauer, W. Dai, 1996, Fourth International ACM Symposium on Field-Programmable Gate Arrays.

Capturing time-of-flight delay for transient analysis based on scattering parameter macromodel

Haifang Liao, Wayne Wei-Ming Dai, 1994, ICCAD.

Topological routing in SURF: generating a rubber-band sketch

Wayne Wei-Ming Dai, Tal Dayan, David Staepelaere, 1991, 28th ACM/IEEE Design Automation Conference.

Electrical and thermal analysis for system-in-a package (SiP) implementation platform

Wayne Wei-Ming Dai, Michael X. Wang, Katsuharu Suzuki, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

S-parameter based macro model of distributed-lumped networks using Pade approximation

Rui Wang, Haifang Liao, Wayne Wei-Ming Dai, 1993, 1993 IEEE International Symposium on Circuits and Systems.

ar Clock Routing for High Perfor Chip and Package CO-Design

Qing Zhu, Wayne Wei-Ming Dai, 1996 .

Area-IO DRAM/logic integration with system-in-a-package (SiP)

Wayne Wei-Ming Dai, Anru Wang, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Tradeoffs in chip and substrate complexity and cost for field programmable multichip modules

J. Darnauer, Wayne Wei-Ming Dai, 1996, 1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.

A novel dimension-reduction technique for the capacitance extraction of 3-D VLSI interconnects

Wei Hong, Zhenhai Zhu, Ben Song, 1998 .

Optimal single hop multiple bus networks

Yoji Kajitani, Wayne Wei-Ming Dai, Yorihiko Hirata, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Capturing Time-of-flight Delay For Transient Analysis Based On Scattering Parameter Macromodel

Haifang Liao, Wayne Wei-Ming Dai, 1994, IEEE/ACM International Conference on Computer-Aided Design.

A domain-specific cell based ASIC design methodology for digital signal processing applications

Wei Li, Kai Liu, Beibei Ren, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Chip parasitic extraction and signal integrity verification (extended abstract)

Wayne Wei-Ming Dai, 1997, DAC.

Fast 3-D inductance extraction in lossy multi-layer substrate

Wayne Wei-Ming Dai, Minqing Liu, Tiejun Yu, 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

Transient analysis of coupled transmission lines characterized with the frequency-dependent losses using scattering-parameter based macromodel

Wayne Wei-Ming Dai, Jimmy Shinn-Hwa Wang, 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.

Pin assignment and routing on a single-layer Pin Grid Array

Wayne Wei-Ming Dai, Man-Fai Yu, 1995, ASP-DAC '95.

S-Parameter Based Macro Model of Distributed-Lumped Networks Using Exponentially Decayed Polynomial Function

Rui Wang, Haifang Liao, Fung-Yuel Chang, 1992, 30th ACM/IEEE Design Automation Conference.

Single-layer fanout routing and routability analysis for Ball Grid Arrays

Wayne Wei-Ming Dai, Man-Fai Yu, 1995, ICCAD.

Design and analysis of area-IO DRAM/logic integration with system-in-a-package (SiP)

Wayne Wei-Ming Dai, Anru Wang, 2005, Sixth international symposium on quality electronic design (isqed'05).

Buffer insertion and sizing under process variations for low power clock distribution

Wayne Wei-Ming Dai, Joe G. Xi, 1995, DAC '95.

How to efficiently capture on-chip inductance effects: introducing a new circuit element K

Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai, 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

Rubber band routing and dynamic data representation

Wayne Wei-Ming Dai, Raymond Kong, Jeffrey Jue, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

A novel dimension reduction technique for the capacitance extraction of 3D VLSI interconnects

Wei Hong, Zhenhai Zhu, Ben Song, 1996, ICCAD 1996.

Design of FPGAs with Area I/O for Field Programmable MCM

Vijayshri Maheshwari, Wayne Wei-Ming Dai, Joel Darnauer, 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

Integration of large-scale FPGA and DRAM in a package using chip-on-chip technology

Yee L. Low, Wayne Wei-Ming Dai, Michael X. Wang, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Topology constrained rectilinear block packing for layout reuse

Wayne Wei-Ming Dai, Maggie Zhiwei Kang, 1998, ISPD '98.

SURF: rubber-band routing system for multichip modules

Wayne Wei-Ming Dai, Tal Dayan, David Staepelaere, 1993, IEEE Design & Test of Computers.

TEG: a new post-layout optimization method

Shuo Zhang, Wayne Wei-Ming Dai, 2002, ISPD '02.

Arbitrary rectilinear block packing based on sequence pair

Wayne Wei-Ming Dai, Maggie Zhiwei Kang, 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

Modeling and analysis of integrated spiral inductors for RF system-in-package

Wayne Wei-Ming Dai, Minqing Liu, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Yield-preferred via insertion based on novel geotopological technology

Wayne Wei-Ming Dai, Fangyi Luo, Yongbo Jia, 2006, Asia and South Pacific Conference on Design Automation, 2006..

Post-route optimization for improved yield using a rubber-band wiring model

Wayne Wei-Ming Dai, Jeffrey Z. Su, W. Dai, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout

Ernest S. Kuh, Wayne Wei-Ming Dai, E. Kuh, 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Jitter-tolerant clock routing in two-phase synchronous systems

Wayne Wei-Ming Dai, Joe G. Xi, 1996, Proceedings of International Conference on Computer Aided Design.

Efficient thee-dimensional extraction based on static and full-wave layered Green's functions

David E. Long, Wayne Wei-Ming Dai, Jinsong Zhao, 1998, DAC.

Delay bounded buffered tree construction for timing driven floorplanning

Tom Dillinger, David P. LaPotin, Wayne Wei-Ming Dai, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models

Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi, 1993, ICCAD.

Useful-skew clock routing with gate sizing for low power design

Wayne Wei-Ming Dai, Joe G. Xi, 1996, DAC '96.

Hierarchical placement and floorplanning in BEAR

Wayne Wei-Ming Dai, W. Dai, 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

General floorplanning with L-shaped, T-shaped and soft blocks based on bounded slicing grid structure

Wayne Wei-Ming Dai, Maggie Zhiwei Kang, W. Dai, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM)

Tsuyoshi Isshiki, Wayne Wei-Ming Dai, 1994, FPL.

Optimal design of self-damped lossy transmission lines for multichip modules

Wayne Wei-Ming Dai, Jimmy Shinn-Hwa Wang, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Routing Region Definition and Ordering Scheme for Building-Block Layout

Tetsuo Asano, Ernest S. Kuh, Wayne Wei-Ming Dai, 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

SPICE compatible circuit models for partial reluctance K

Hao Ji, Wayne Wei-Ming Dai, Qingjian Yu, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

Interchangeable pin routing with application to package layout

Wayne Wei-Ming Dai, Joel Darnauer, Man-Fai Yu, 1996, Proceedings of International Conference on Computer Aided Design.

Bit-serial pipeline synthesis and layout for large-scale configurable systems

Tsuyoshi Isshiki, Hiroaki Kunieda, Wayne Wei-Ming Dai, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

Routability of a rubber-band sketch

Masao Sato, Wayne Wei-Ming Dai, Raymond Kong, 1991, 28th ACM/IEEE Design Automation Conference.

A Dynamic and Efficient Representation of Building-Block Layout

Ernest S. Kuh, Masao Sato, Wayne Wei-Ming Dai, 1987, 24th ACM/IEEE Design Automation Conference.

Crosstalk noise estimation for noise management

Wayne Wei-Ming Dai, Paul B. Morton, 2002, DAC '02.

Planar clock routing for high performance chip and package co-design

Qing Zhu, Qing K. Zhu, Wayne Wei-Ming Dai, 1996, IEEE Trans. Very Large Scale Integr. Syst..

Design of C++ class library and bit-serial compiler for variable-precision datapath synthesis on adaptive computing systems

Zhao Fang, Wayne Wei-Ming Dai, Michael X. Wang, 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

High-speed clock network sizing optimization based on distributed RC and lossy RLC interconnect models

Qing Zhu, Qing K. Zhu, Wayne Wei-Ming Dai, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Hierarchical placement for macrocells: a 'meet in the middle' approach

Massoud Pedram, Bernhard Eschermann, Wayne Wei-Ming Dai, 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

Useful-Skew Clock Routing with Gate Sizing for Low Power Design

Wayne Wei-Ming Dai, Joe G. Xi, 1997, J. VLSI Signal Process..

An efficient sequential quadratic programming formulation of optimal wire spacing for cross-talk noise avoidance routing

Wayne Wei-Ming Dai, Paul B. Morton, W. Dai, 1999, ISPD '99.

TEG: a new post-layout optimization method

Shuo Zhang, Wayne Wei-Ming Dai, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Fast parameters extraction of general three-dimension interconnects using geometry independent measured equation of invariance

Wei Hong, Wayne Wei-Ming Dai, Weikai Sun, 1996, DAC '96.

A silicon-on-silicon field programmable multichip module (FPMCM) integrating FPGA and MCM technologies

Tsuyoshi Isshiki, J. Darnauer, Vijayshri Maheshwari, 1995 .

Interchangeable pin routing with application to package layout

J. Darnauer, Wayne Wei-Ming Dai, Man-Fai Yu, 1996, ICCAD 1996.

Guest Editor's Introduction

Kwang-Ting Cheng, Wayne Wei-Ming Dai, K. Cheng, 1993, GeoInformatica.

High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems

Tsuyoshi Isshiki, Wayne Wei-Ming Dai, 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect

Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai, 2001, ASP-DAC '01.

Historical Perspective of System in Package (SiP)

Wayne Wei-Ming Dai, W. Dai, 2016, IEEE Circuits and Systems Magazine.

Critical technologies and methodologies for systems-on-chips (tutorial)

Wayne H. Wolf, Rob Roy, Wayne Wei-Ming Dai, 1997, ICCAD.

Perfect-balance planar clock routing with minimal path-length

Qing Zhu, Wayne Wei-Ming Dai, 1992, ICCAD.

Transformation of min-max optimization to least-square estimation and application to interconnect design optimization

Wayne Wei-Ming Dai, Jimmy Shinn-Hwa Wang, 1995, ICCD.

Perfect-balance planar clock routing with minimal path-length

Qing Zhu, Qing K. Zhu, Wayne Wei-Ming Dai, 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels

Haifang Liao, Wayne Wei-Ming Dai, 1995, ICCAD.

Beyond the red brick wall (panel): challenges and solutions in 50nm physical design

Sani R. Nassif, Hidetoshi Onodera, Andrew B. Kahng, 2001, ASP-DAC '01.

Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models

Qing Zhu, Qing K. Zhu, Wayne Wei-Ming Dai, 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

Sensitivity analysis of interconnect networks based on S-parameter macromodel

Wayne Wei-Ming Dai, Yanhua Sun, 1995, Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95).

A numerical stable algorithm for constructing constrained Delaunay triangulation and application to multichip module layout

Wayne Wei-Ming Dai, Yizhi Lu, 1991, China., 1991 International Conference on Circuits and Systems.