Peter A. Milder

发表

MEMOCODE 2014 design contest: k-Nearest Neighbors with Mahalanobis distance metric

Peter A. Milder, 2014, 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE).

Hardware implementation of the discrete fourier transform with non-power-of-two problem size

Franz Franchetti, James C. Hoe, Markus Püschel, 2010, 2010 IEEE International Conference on Acoustics, Speech and Signal Processing.

Nautilus: Fast automated IP design space search using guided genetic algorithms

James C. Hoe, Michael Papamichael, Peter A. Milder, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Fused-layer CNN accelerators

Manoj Alwani, Michael Ferdman, Han Chen, 2016, 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

MEMOCODE 2015 design contest: Continuous skyline computation

Peter A. Milder, 2015, 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE).

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

James C. Hoe, Eric S. Chung, Ken Mai, 2010, 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture.

Fast and accurate resource estimation of automatically generated custom DFT IP cores

James C. Hoe, Markus Püschel, Peter A. Milder, 2006, FPGA '06.

Formal datapath representation and manipulation for implementing DSP transforms

Franz Franchetti, James C. Hoe, Markus Püschel, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Domain-specific library generation for parallel software and hardware platforms

Franz Franchetti, James C. Hoe, Hao Shen, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

A mathematical approach for compiling and optimizing hardware implementation of DSP transforms

Peter A. Milder, Peter Milder, 2010 .

Blind symbol synchronisation in direct-detection optical OFDM using virtual subcarriers

Polina Bayvel, Benn C. Thomsen, Robert I. Killey, 2014, OFC.

Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only)

Franz Franchetti, James C. Hoe, Peter A. Milder, 2012, FPGA '12.

Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression

Brett H. Meyer, Peter A. Milder, Seyyed Hasan Mozafari, 2017, ACM Trans. Embed. Comput. Syst..

Blind symbol synchronisation in direct-detection optical OFDM using virtual subcarriers

Polina Bayvel, Benn C. Thomsen, Robert I. Killey, 2014, OFC 2014.

A Raspberry Pi Based Data-Centric MAC for Robust Multicast in Vehicular Network

Yuanyuan Yang, Bing Zhou, Fan Ye, 2018, MobiCom.

Permuting streaming data using RAMs

James C. Hoe, Markus Püschel, Peter A. Milder, 2009, JACM.

Computer Generation of Hardware for Linear Digital Signal Processing Transforms

Franz Franchetti, James C. Hoe, Markus Püschel, 2012, TODE.

FPGASwarm: High Throughput Model Checking on FPGAs

Michael Ferdman, Peter A. Milder, Shenghsun Cho, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

"Smart" design space sampling to predict Pareto-optimal solutions

Andreas Krause, Markus Püschel, Peter A. Milder, 2012, LCTES '12.

Practical Matlab experience in lecture-based signals and systems courses

Mónica F. Bugallo, Peter A. Milder, 2017, 2017 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Overcoming resource underutilization in spatial CNN accelerators

Michael Ferdman, Peter A. Milder, Yongming Shen, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

MEMOCODE 2016 design contest: K-means clustering

Peter A. Milder, 2016, 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE).

Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes

Franz Franchetti, James C. Hoe, Peter A. Milder, 2012, 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines.

Quantifying Energy and Latency Improvements of FPGA-Based Sensors for Low-Cost Spectrum Monitoring

Arani Bhattacharya, Han Chen, Samir Ranjan Das, 2018, 2018 IEEE International Symposium on Dynamic Spectrum Access Networks (DySPAN).

FFT Compiler: from math to efficient hardware HLDVT invited short paper

Franz Franchetti, James C. Hoe, Markus Püschel, 2007, 2007 IEEE International High Level Design Validation and Test Workshop.

A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs

Michael Ferdman, Han Chen, Peter A. Milder, 2018, FPGA.

Data Flow Oriented Hardware Design of RNS-based Polynomial Multiplication for SHE Acceleration

Nicolas Ventroux, Renaud Sirdey, Peter A. Milder, 2018, IACR Trans. Cryptogr. Hardw. Embed. Syst..

Escher: A CNN Accelerator with Flexible Buffering to Minimize Off-Chip Transfer

Michael Ferdman, Peter A. Milder, Yongming Shen, 2017, 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Trade-offs in execution signature compression for reliable processor systems

Brett H. Meyer, Peter A. Milder, Maria Isabel Mera, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Automatic generation of streaming datapaths for arbitrary fixed permutations

James C. Hoe, Markus Püschel, Peter A. Milder, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Computer generation of streaming sorting networks

Markus Püschel, Peter A. Milder, Marcela Zuluaga, 2012, DAC Design Automation Conference 2012.

Maximizing CNN accelerator efficiency through resource partitioning

Michael Ferdman, Peter A. Milder, Yongming Shen, 2016, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).

Streaming Sorting Networks

Markus Püschel, Peter A. Milder, Marcela Zuluaga, 2016, TODE.

Improving fixed-point accuracy of FFT cores in O-OFDM systems

James C. Hoe, Madeleine Glick, Christian R. Berger, 2012, 2012 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Generating FPGA-Accelerated DFT Libraries

Franz Franchetti, José M. F. Moura, James C. Hoe, 2007, 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007).

Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide DRAM Controller Interfaces

Michael Ferdman, Peter A. Milder, Yongming Shen, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Automatic generation of customized discrete Fourier transform IPs

James C. Hoe, Markus Püschel, Peter A. Milder, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Storage-Efficient Batching for Minimizing Bandwidth of Fully-Connected Neural Network Layers (Abstract Only)

Michael Ferdman, Peter A. Milder, Yongming Shen, 2017, FPGA.

Discrete Fourier Transform Compiler : From Mathematical Representation to Efficient Hardware

Franz Franchetti, James C. Hoe, Markus Püschel, 2007 .

Linear Transforms : From Math to Efficient Hardware Extended

Franz Franchetti, James C. Hoe, Markus Püschel, 2008 .