H. Kothari

A mobility enhancement strategy for sub-14nm power-efficient FDSOI technologies

O. Rozeau, O. Faynot, G. Ghibaudo, 2014, 2014 IEEE International Electron Devices Meeting.

Reliability challenges for the 10nm node and beyond

James H. Stathis, R. G. Southwick, M. Wang, 2014, 2014 IEEE International Electron Devices Meeting.

FDSOI CMOS devices featuring dual strained channel and thin BOX extendable to the 10nm node

O. Faynot, Y. Escarabajal, B. Lherron, 2014, 2014 IEEE International Electron Devices Meeting.

SiGe composition and thickness effects on NBTI in replacement metal gate / high-κ technologies

R. G. Southwick, A. Kerber, P. Srinivasan, 2014, 2014 IEEE International Reliability Physics Symposium.

New layout dependency in high-k/Metal Gate MOSFETs

M. Sherony, F. Arnaud, F. Matsuoka, 2011, 2011 International Electron Devices Meeting.

Low-K Interconnect Stack with Thick Metal 9 Redistribution Layer and Cu Die Bump for 45nm High Volume Manufacturing

D. Becher, T. Mule, P. Moon, 2008, 2008 International Interconnect Technology Conference.

Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate process

Y. Liu, T. Nigam, S. Uppal, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

NFET effective work function improvement via stress memorization technique in replacement metal gate technology

Y. Liu, S. Jain, S. Samavedam, 2013, 2013 Symposium on VLSI Technology.