Kristin De Meyer

发表

High-k materials for tunnel barrier engineering in future memory technologies

Pieter Blomme, Bogdan Govoreanu, Maarten Rosmeulen, 2004 .

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices

Aaron Thean, Philippe Roussel, Guido Groeseneken, 2015, 2015 IEEE International Reliability Physics Symposium.

Si1-xGex-Channel PFETs: Scalability, Layout Considerations and Compatibility with Other Stress Techniques

Geert Hellings, Eddy Simoen, Liesbeth Witters, 2011 .

Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach

Geert Hellings, Xingsheng Wang, Ewan Towie, 2011 .

Scalability of quantum well devices for digital logic applications

Geert Hellings, Kristin De Meyer, Marc Meuris, 2009 .

22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiver

Michiel Steyaert, Peter De Heyn, Philippe P. Absil, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

Emerging device solutions for the post-classical CMOS era

Stefan Kubicek, Kristin De Meyer, Peter Verheyen, 2003 .

Invited) Vertical Nanowire FET Integration and Device Aspects

Nadine Collaert, Aaron Thean, Tsvetan Ivanov, 2016 .

3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV)

Eric Beyne, Wim Dehaene, Anne Jourdain, 2009, 2009 IEEE International Conference on 3D System Integration.

Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack

Nadine Collaert, Malgorzata Jurczak, Kristin De Meyer, 2009, 2009 22nd International Conference on VLSI Design.

Modelling mobility degradation due to remote Coulomb scattering from dielectric charges and its impact on MOS device performance

Stefan De Gendt, Wim Magnus, Kristin De Meyer, 2005, Microelectron. Reliab..

Understanding device performance by incorporating 2D-carrier profiles from high resolution scanning spreading resistance microscopy into device simulations

Geert Hellings, Trudo Clarysse, Kristin De Meyer, 2011 .

Lateral NWFET optimization for beyond 7nm nodes

Diederik Verkest, Aaron Thean, Praveen Raghavan, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

Sensitivity Analysis of the Deal‐Grove Model Parameters Problem Definition and Strategy Considerations

Kristin De Meyer, L. Dupas, Zhi‐Min Ling, 1988 .

Process and device modeling and characterization needs for deep submicron CMOS technology

Kristin De Meyer, 1998 .

Physics Based Accurate Extraction of LEFF and RS for Deep Submicron Mosfets

Serge Biesemans, Kristin De Meyer, 1999 .

Poly-SiGe for MEMS-above-CMOS Sensors

Ann Witvrouw, Kristin De Meyer, Pilar González Ruiz, 2013 .

An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations

Eric Beyne, Geert Van der Plas, Dragomir Milojevic, 2011, 2011 Design, Automation & Test in Europe.

Carrier transport modelling in the inversion layer of submicron semiconductor devices

Wim Magnus, Kristin De Meyer, Cristiano Sala, 1990, Eur. Trans. Telecommun..

Mechanism of O2-anneal induced Vfb shifts of Ru gated stacks

Z. Li, Luigi Pantisano, Tom Schram, 2007, Microelectron. Reliab..

Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures

Geert Hellings, A. Asenov, Karol Kalna, 2010, Microelectron. Reliab..

Stress Techniques and Mobility Enhancement in FinFET Architectures

Naoto Horiguchi, Geert Hellings, Anabela Veloso, 2013 .

Low-Power, 10-Gbps 1.5-Vpp differential CMOS driver for a silicon electro-optic ring modulator

Michiel Steyaert, Hui Yu, Wim Bogaerts, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

From the Editor‐in‐Chief

Hiroshi Toshiyoshi, Hiroshi Iwai, Atsushi Sanada, 2006 .

Conclusions Future Work and Outlook

Geert Hellings, Kristin De Meyer, 2013 .

Simulation of Semiconductor Processes and Devices 1998: SISPAD 98

Serge Biesemans, Kristin De Meyer, Processes, 2012 .

Scalability of the Si/sub 1-x/Ge/sub x/ source/drain technology for the 45-nm technology node and beyond

R. Rooyackers, Kristin De Meyer, F. Nouri, 2006, IEEE Transactions on Electron Devices.

Ammonium sulfide vapor passivation of In0.53Ga0.47As and InP surfaces

Marc Heyns, Kristin De Meyer, Marc Meuris, 2011 .

A model determining optimal doping concentration and material's band gap of tunnel field-effect transistors

Guido Groeseneken, Wim Magnus, Kristin De Meyer, 2012 .

Systematic study of shallow junction formation on germanium substrates

Geert Hellings, Eddy Simoen, Trudo Clarysse, 2011 .

CMOS compatible polycrystalline silicon–germanium based pressure sensors

Ann Witvrouw, Kristin De Meyer, Pilar Gonzalez, 2012 .

Simulation of Semiconductor Processes and Devices 1998

Serge Biesemans, Kristin De Meyer, 1998 .

High Hole Mobility in 65 nm Strained Ge p-Channel Field Effect Transistors with HfO2Gate Dielectric

Jerome Mitard, Jacopo Franco, Luigi Pantisano, 2011 .

High Mobility and Quantum Well Transistors

Geert Hellings, Kristin De Meyer, 2013 .

Modeling the impact of junction angles in tunnel field-effect transistors

Guido Groeseneken, Kristin De Meyer, Anne S. Verhulst, 2012 .

The implant-free quantum well field-effect transistor: Harnessing the power of heterostructures☆

Geert Hellings, Jerome Mitard, Niamh Waldron, 2012 .

Characterization of the spatial charge distribution in local charge-trapping memory devices using the charge-pumping technique

Laurent Breuil, Maarten Rosmeulen, Luc Haspeslagh, 2004 .

An effective model for analysing tunneling gate leakage currents through ultrathin oxides and high-k gate stacks from Si inversion layers

Pieter Blomme, Jan Van Houdt, Kristin De Meyer, 2004 .

Stress Techniques in Advanced Transistor Architectures: Bulk FinFETs and Implant-Free Quantum Well Transistors

Naoto Horiguchi, Geert Hellings, Jerome Mitard, 2012 .

The vertical heterojunction MOSFET

Nadine Collaert, Roger Loo, Kristin De Meyer, 1998 .

Electrical and material evaluation of the MOCVD TiN as metal gate electrode for advanced CMOS technology

Tom Schram, Stefan De Gendt, Malgorzata Jurczak, 2006 .

Transient effects in PD SOI MOSFETs and potential DRAM applications

O. Faynot, Sorin Cristoloveanu, Jean-Michel Sallese, 2002 .