X. Baillin

Pixel level packaging for uncooled IRFPA

G. Dumont, W. Rabaud, X. Baillin, 2011, Defense + Commercial Sensing.

Recent development in pixel level packaging for uncooled IRFPA

W. Rabaud, X. Baillin, V. Goudon, 2010, Security + Defence.

Gold-tin bonding for 200mm wafer level hermetic MEMS packaging

X. Baillin, N. Sillon, C. Gillot, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Future challenges and opportunities for heterogeneous process technology. Towards the thin films, Zero Intrinsic Variability devices, Zero Power era

P. Batude, M. Vinet, F. Andrieu, 2014, 2014 IEEE International Electron Devices Meeting.

Through silicon vias technology for CMOS image sensors packaging

X. Baillin, C. Brunet-Manquat, N. Sillon, 2008, 2008 58th Electronic Components and Technology Conference.

Direct evidence of dislocation transmission through ∊= 9 grain boundaries in germanium and silicon by in situ high-voltage electron microscopy observations

X. Baillin, X. Baillin, A. George, 1990 .

Via First Technology Development Based on High Aspect Ratio Trenches Filled with Doped Polysilicon

X. Baillin, N. Sillon, D. Henry, 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

Hermetic wafer-level packaging development for RF MEMS switch

C. Ferrandon, P. Rey, X. Baillin, 2010, 3rd Electronics System Integration Technology Conference ESTC.