Tiju Jacob

Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor

Saurabh Dighe, Sriram R. Vangal, Paolo A. Aseron, 2011, IEEE Journal of Solid-State Circuits.

Within-die variation-aware dynamic-voltage-frequency scaling core mapping and thread hopping for an 80-core processor

Saurabh Dighe, Sriram R. Vangal, Paolo A. Aseron, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Split-Path Fused Floating Point Multiply Accumulate (FPMAC)

Sanu Mathew, Ram Krishnamurthy, Tiju Jacob, 2013, 2013 IEEE 21st Symposium on Computer Arithmetic.

A 2 Tb/s 6$\,\times\,$ 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS

Sriram R. Vangal, Shasi Kumar, Tiju Jacob, 2011, IEEE Journal of Solid-State Circuits.

An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS

Saurabh Dighe, Sriram R. Vangal, Tiju Jacob, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

A 2 Tb/s 6 × 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS

Sriram R. Vangal, Shasi Kumar, Tiju Jacob, 2011, VLSIC 2011.

A 2Tb/s 6×4 mesh network with DVFS and 2.3Tb/s/W router in 45nm CMOS

Shasi Kumar, Tiju Jacob, Vasantha Erraguntla, 2010, 2010 Symposium on VLSI Circuits.

A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS

Timothy Mattson, Saurabh Dighe, Tiju Jacob, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).