Li-Fu Chang

A proposal for accurately modeling frequency-dependent on-chip interconnect impedance

Li-Fu Chang, Keh-Jeng Chang, Christophe J. Bianchi, 2000, Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525).

Accurately predicting copper interconnect topographies in foundry design for manufacturability flows

Linda Zhuang, Philippe Hurat, Li-Fu Chang, 2011, Advanced Lithography.

Improving copper CMP topography by dummy metal fill co-optimizing electroplating and CMP planarization

Li-Fu Chang, Daniel Lu, Zhong Fan, 2010, Advanced Lithography.

Simulating frequency-dependent current distribution for inductance modeling of on-chip copper interconnects

Li-Fu Chang, Keh-Jeng Chang, Robert Mathews, 2000, ISPD '00.

Detection of OPC conflict edges through MEEF analysis

Guojie Cheng, Gary Zhang, Abhishek Vikram, 2010, Advanced Lithography.

Incorporating process induced effects into RC extraction

Li-Fu Chang, Keh-Jeng Chang, Robert Mathews, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Foundry verification of IP and incoming designs for manufacturing variability

Li-Fu Chang, Nishath Verghese, Elain Zou, 2010, Advanced Lithography.

Accurate and efficient inductance extraction for SoC noise and signal integrity

Li-Fu Chang, K.-J. Chang, 2002, Electrical Performance of Electronic Packaging,.

RLCK Extraction and Simulation in High-Speed SoC Designs (Tutorial Abstract)

Li-Fu Chang, 2002, ISQED.

DRAM bit-line coupling noise analysis and simulation of process sensitivity for COB scheme

Min-Hwa Chi, Li-Fu Chang, 1998, 1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116).

When should on-chip inductance modeling become necessary for VLSI timing analysis?

Li-Fu Chang, Keh-Jeng Chang, Robert G. Mathews, 2000, Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407).