Yee-Chia Yeo

发表

Pseudomorphic GeSn/Ge Multiple-Quantum-Well on Silicon for Photo Detection and Modulation at 2 μm Wavelength Range

Hong Wang, Wei Wang, Yuan Dong, 2019, 2019 Optical Fiber Communications Conference and Exhibition (OFC).

Design of power integrated circuits in full AlGaN/GaN MIS‐HEMT configuration for power conversion

Yee-Chia Yeo, Ruize Sun, Yung C. Liang, 2017 .

Ge0.9Sn0.1 multiple-quantum-well p-i-n photodiodes for optical communications at 2 μm

Yuan Dong, Gengchiau Liang, Shengqiang Xu, 2017, OFC.

Compact HSPICE model for IMOS device

Dennis Sylvester, Chun-Huat Heng, Yee-Chia Yeo, 2008 .

Enabling Universal Memory by Overcoming the Contradictory Speed and Stability Nature of Phase-Change Materials

Weijie Wang, Andrea L. Lacaita, Luping Shi, 2012, Scientific Reports.

Metrology solutions for high performance germanium multi-gate field-effect transistors using optical scatterometry

Bin Liu, Jie Li, Jiangtao Hu, 2013, Advanced Lithography.

Design of Full GaN Power Integrated DC-DC Converter with Over-current Protection

Yee-Chia Yeo, Yung C. Liang, Ruize Sun, 2018, 2018 IEEE International Conference on Electrical Systems for Aircraft, Railway, Ship Propulsion and Road Vehicles & International Transportation Electrification Conference (ESARS-ITEC).

Advanced Contact Technology for MOSFETs: Integration of New Materials for Series Resistance Reduction

Yee-Chia Yeo, Rinus T. P. Lee, 2009 .

Scaling of CMOS FinFETs towards 10 nm

Yee-Chia Yeo, Chien-Chao Huang, Fu-Liang Yang, 2003, 2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672).

Metrology solutions using optical scatterometry for advanced CMOS: III-V and Germanium multi-gate field-effect transistors

Bin Liu, Jiangtao Hu, Yee-Chia Yeo, 2013, Optical Metrology.

Development of GaN Monolithic Integrated Circuits for Power Conversion

Yee-Chia Yeo, Yung C. Liang, Ruize Sun, 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

5nm-gate nanowire FinFET

Chenming Hu, Yee-Chia Yeo, Mong-Song Liang, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

GeSn-on-insulator substrate formed by direct wafer bonding

Chuan Seng Tan, Wei Wang, Bing Wang, 2016 .

Achieving Conduction Band-Edge Schottky Barrier Height for Arsenic-Segregated Nickel Aluminide Disilicide and Implementation in FinFETs With Ultra-Narrow Fin Widths

Guo-Qiang Lo, Ming Zhu, Yee-Chia Yeo, 2008, IEEE Electron Device Letters.

N-Channel MOSFETs With Embedded Silicon–Carbon Source/Drain Stressors Formed Using Cluster-Carbon Implant and Excimer-Laser-Induced Solid Phase Epitaxy

Yee-Chia Yeo, K. Sekar, W. Krull, 2008, IEEE Electron Device Letters.

Realistic Trap Configuration Scheme With Fabrication Processes in Consideration for the Simulations of AlGaN/GaN MIS-HEMT Devices

Yee-Chia Yeo, Yung C. Liang, Ruize Sun, 2016, IEEE Journal of Emerging and Selected Topics in Power Electronics.

Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate

Yee-Chia Yeo, Genquan Han, Pengfei Guo, 2011 .

Performance boost for In0.53Ga0.47As channel N-MOSFET using silicon nitride liner stressor with high tensile stress

Luping Shi, Xiao Gong, Yee-Chia Yeo, 2009, 2009 International Semiconductor Device Research Symposium.

Germanium-Tin on Si Avalanche Photodiode: Device Design and Technology Demonstration

Wei Wang, Gengchiau Liang, Xin Xu, 2015, IEEE Transactions on Electron Devices.

Hot Carrier Reliability of Strained N-Mosfet with Lattice Mismatched Source/Drain Stressors

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

Direct-tunneling gate leakage current in double-gate and ultrathin body MOSFETs

Chenming Hu, Yee-Chia Yeo, Leland Chang, 2002 .

High-performance GeSn photodetector and fin field-effect transistor (FinFET) on an advanced GeSn-on-insulator platform.

Wei Wang, Chuan Seng Tan, Shengqiang Xu, 2018, Optics express.

Phase Change Random Access Memory Devices with Nickel Silicide and Platinum Silicide Electrode Contacts for Integration with CMOS Technology

Luping Shi, Tow Chong Chong, Rong Zhao, 2011 .

Ultra High-Stress Liner Comprising Diamond-Like Carbon for Performance Enhancement of p-Channel Multiple-Gate Transistors

Yee-Chia Yeo, Tsung-Yang Liow, Y. Yeo, 2009, IEEE Transactions on Electron Devices.

Molybdenum Gate Electrode Technology For Deep Sub-Micron CMOS Generations

Pushkar Ranade, Chenming Hu, Yee-Chia Yeo, 2001 .

Electronic band structure and effective mass parameters of Ge1-xSnx alloys

Weijun Fan, Yee-Chia Yeo, Genquan Han, 2012 .

Probing the ErSi1.7 Phase Formation by Micro-Raman Spectroscopy

Yee-Chia Yeo, Tsung-Yang Liow, Ganesh S. Samudra, 2007 .

High-speed photo detection at two-micron-wavelength: technology enablement by GeSn/Ge multiple-quantum-well photodiode on 300 mm Si substrate.

Hong Wang, Wei Wang, Shengqiang Xu, 2019, Optics express.

Direct tunneling leakage current and scalability of alternative gate dielectrics

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

Gate-all-around CMOS (InAs n-FET and GaSb p-FET) based on vertically-stacked nanowires on a Si platform, enabled by extremely-thin buffer layer technology and common gate stack and contact modules

Gengchiau Liang, Xiao Gong, Yee-Chia Yeo, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Strain optimization in ultrathin body transistors with silicon-germanium source and drain stressors

Yee-Chia Yeo, Ganesh S. Samudra, Anuj Madan, 2008 .

Uniaxially strained germanium-tin (GeSn) gate-all-around nanowire PFETs enabled by a novel top-down nanowire formation technology

Bin Liu, Ran Cheng, Xiao Gong, 2013, 2013 Symposium on VLSI Technology.

I-MOS Transistor With an Elevated Silicon–Germanium Impact-Ionization Region for Bandgap Engineering

Guo-Qiang Lo, Yee-Chia Yeo, Lap Chan, 2006, IEEE Electron Device Letters.

A novel floating body cell memory with a laterally engineered bandgap using a Si-Si:C heterostructure

Sung-Jin Choi, Yee-Chia Yeo, Yang-Kyu Choi, 2010, 2010 International Electron Devices Meeting.

A Double-Spacer I-MOS Transistor With Shallow Source Junction and Lightly Doped Drain for Reduced Operating Voltage and Enhanced Device Performance

Yee-Chia Yeo, Lap Chan, G. Samudra, 2008, IEEE Electron Device Letters.

Atomically flat and uniform relaxed III–V epitaxial films on silicon substrate for heterogeneous and hybrid integration

Yee-Chia Yeo, Aryan Afzalian, Gerben Doornbos, 2017, Scientific Reports.

Germanium-based transistors for future high performance and low power logic applications

Xiao Gong, Yee-Chia Yeo, Georgios Vellianitis, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Self-Aligned Gate-First In0.7Ga0.3As n-MOSFETs with an InP Capping Layer for Performance Enhancement

Xiao Gong, Yee-Chia Yeo, Clement Hsingjen Wann, 2011 .

Formation of Ge nanocrystals in HfAlO high-k dielectric and application in memory device

Narayanan Balasubramanian, Dim-Lee Kwong, Yee-Chia Yeo, 2004 .

Formation of epitaxial metastable NiGe2 thin film on Ge(100) by pulsed excimer laser anneal

Yee-Chia Yeo, Dongzhi Chi, Y. Yeo, 2010 .

Ultrafast switching in nanoscale phase-change random access memory with superlattice-like structures

Luping Shi, Rong Zhao, Yee-Chia Yeo, 2011, Nanotechnology.

Laser Annealing of Amorphous Germanium on Silicon–Germanium Source/Drain for Strain and Performance Enhancement in pMOSFETs

Ming Zhu, Kah-Wee Ang, Yee-Chia Yeo, 2008, IEEE Electron Device Letters.

A 65nm node strained SOI technology with slim spacer

Chenming Hu, Tsai-Sheng Gau, Yee-Chia Yeo, 2003, IEEE International Electron Devices Meeting 2003.

In0.7Ga0.3As Channel n-MOSFET with Self-Aligned Ni–InGaAs Source and Drain

Xiao Gong, Yee-Chia Yeo, Clement Hsingjen Wann, 2011 .

Au-Free AlGaN/GaN MIS-HEMTs With Embedded Current Sensing Structure for Power Switching Applications

Yee-Chia Yeo, Yung C. Liang, Ruize Sun, 2017, IEEE Transactions on Electron Devices.

High-Performance Germanium $\Omega$ -Gate MuGFET With Schottky-Barrier Nickel Germanide Source/Drain and Low-Temperature Disilane-Passivated Gate Stack

Bin Liu, Xiao Gong, Yee-Chia Yeo, 2012, IEEE Electron Device Letters.

Effect of Fin Doping Concentration on the Electrical Characteristics of Germanium-on-Insulator Multi-Gate Field-Effect Transistor

Bin Liu, Xiao Gong, Yee-Chia Yeo, 2013 .

N-Channel (110)-Sidewall Strained FinFETs With Silicon–Carbon Source and Drain Stressors and Tensile Capping Layer

Yee-Chia Yeo, Tsung-Yang Liow, N. Balasubramanian, 2007, IEEE Electron Device Letters.

Strain and Materials Engineering for the I-MOS Transistor With an Elevated Impact-Ionization Region

Guo-Qiang Lo, Yee-Chia Yeo, Lap Chan, 2007, IEEE Transactions on Electron Devices.

N-channel FinFETs With 25-nm Gate Length and Schottky-Barrier Source and Drain Featuring Ytterbium Silicide

Guo-Qiang Lo, Yee-Chia Yeo, Tsung-Yang Liow, 2007, IEEE Electron Device Letters.

Metal-dielectric band alignment and its implications for metal gate complementary metal-oxide-semiconductor technology

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

Hot-Carrier Effects in Strained n-Channel Transistor With Silicon–Carbon $(\hbox{Si}_{1 - y}\hbox{C}_{y})$ Source/Drain Stressors and Its Orientation Dependence

Kah-Wee Ang, Yee-Chia Yeo, N. Balasubramanian, 2007, IEEE Electron Device Letters.

Strained Thin-Body p-MOSFET With Condensed Silicon-Germanium Source/Drain for Enhanced Drive Current Performance

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2007, IEEE Electron Device Letters.

Chlorine- and Fluorine-based dry etching of Germanium-Tin

Wei Wang, Xin Xu, Yee-Chia Yeo, 2014, 2014 7th International Silicon-Germanium Technology and Device Meeting (ISTDM).

Sulfur-Induced PtSi:C/Si:C Schottky Barrier Height Lowering for Realizing N-Channel FinFETs With Reduced External Resistance

Yee-Chia Yeo, Tsung-Yang Liow, Y. Yeo, 2009, IEEE Electron Device Letters.

Strained In0.53Ga0.47As n-MOSFETs: Performance boost with in-situ doped lattice-mismatched source/drain stressors and interface engineering

Xiao Gong, Yee-Chia Yeo, Hock-Chun Chin, 2006, 2009 Symposium on VLSI Technology.

Tunneling field-effect transistor with Ge/In0.53Ga0.47As heterostructure as tunneling junction

Yee-Chia Yeo, Yuanbing Cheng, Genquan Han, 2013 .

Carrier Transport Characteristics of Sub-30 nm Strained N-Channel FinFETs Featuring Silicon-Carbon Source/Drain Regions and Methods for Further Performance Enhancement

Yee-Chia Yeo, Tsung-Yang Liow, N. Balasubramanian, 2006, 2006 International Electron Devices Meeting.

Platinum Germanosilicide as Source/Drain Contacts in P-Channel Fin Field-Effect Transistors (FinFETs)

Yee-Chia Yeo, Y. Yeo, D. Chi, 2009, IEEE Transactions on Electron Devices.

Analysis of optical gain and threshold current density of wurtzite InGaN/GaN/AlGaN quantum well lasers

Tow Chong Chong, Yee-Chia Yeo, Ming-Fu Li, 1998 .

P-Channel Tri-Gate FinFETs Featuring $\hbox{Ni}_{1 - y}\hbox{Pt}_{y} \hbox{SiGe}$ Source/Drain Contacts for Enhanced Drive Current Performance

Yee-Chia Yeo, Tsung-Yang Liow, Y. Yeo, 2008, IEEE Electron Device Letters.

Enhanced performance in sub-100 nm CMOSFETs using strained epitaxial silicon-germanium

Supika Mashiro, Chenming Hu, Yee-Chia Yeo, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Two-micron-wavelength germanium-tin photodiodes with low dark current and gigahertz bandwidth.

Wei Wang, Shengqiang Xu, Xiao Gong, 2017, Optics express.

Strained ${\rm n}$-MOSFET With Embedded Source/Drain Stressors and Strain-Transfer Structure (STS) for Enhanced Transistor Performance

Kah-Wee Ang, Yee-Chia Yeo, N. Balasubramanian, 2008, IEEE Transactions on Electron Devices.

Thin body silicon-on-insulator N-MOSFET with silicon-carbon source/drain regions for performance enhancement

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

Yee-Chia Yeo, Ganesh S. Samudra, Eng-Huat Toh, 2007 .

Cointegration of In Situ Doped Silicon–Carbon Source and Silicon–Carbon I-Region in P-Channel Silicon Nanowire Impact-Ionization Transistor

Yee-Chia Yeo, Lap Chan, Eng-Huat Toh, 2008, IEEE Electron Device Letters.

Strained p-Channel FinFETs With Extended $\Pi$ -Shaped Silicon–Germanium Source and Drain Stressors

Yee-Chia Yeo, Tsung-Yang Liow, N. Balasubramanian, 2007, IEEE Electron Device Letters.

Bias temperature instability (BTI) characteristics of graphene Field-Effect Transistors

Bin Liu, Yee-Chia Yeo, Chunlei Zhan, 2011, Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications.

Sub-0.1-eV Effective Schottky-Barrier Height for NiSi on n-Type Si (100) Using Antimony Segregation

Yee-Chia Yeo, Lap Chan, G. Samudra, 2007, IEEE Electron Device Letters.

Strained n-Channel FinFETs Featuring In Situ Doped Silicon – Carbon ( Si 1 − y C y ) Source and Drain Stressors With High Carbon Content

Yee-Chia Yeo, Tsung-Yang Liow, Matthias Bauer, 2009 .

Study of interfaces between phase-change material Ge2Sb2Te5 and prevalent complementary metal-oxide semiconductor materials by XPS†

Yee-Chia Yeo, Zheng Zhang, Jisheng Pan, 2012 .

Enhanced Strain Effects in 25-nm Gate-Length Thin-Body nMOSFETs With Silicon–Carbon Source/Drain and Tensile-Stress Liner

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2007, IEEE Electron Device Letters.

Contact Resistance Reduction for Strained N-MOSFETs With Silicon-Carbon Source/Drain Utilizing Aluminum Ion Implant and Aluminum Profile Engineering

Yee-Chia Yeo, Y. Yeo, Qian Zhou, 2013, IEEE Transactions on Electron Devices.

Lattice strain analysis of transistor structures with silicon–germanium and silicon–carbon source∕drain stressors

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2005 .

III-V Multiple-Gate Field-Effect Transistors With High-Mobility In 0.7 Ga 0.3 As Channel and Epi-Controlled Retrograde-Doped Fin

Luping Shi, Xiao Gong, Yee-Chia Yeo, 2011 .

Pulsed Laser Annealing of Silicon-Carbon Source/Drain in MuGFETs for Enhanced Dopant Activation and High Substitutional Carbon Concentration

Yee-Chia Yeo, Tsung-Yang Liow, N. Balasubramanian, 2008, IEEE Electron Device Letters.

A High-Stress Liner Comprising Diamond-Like Carbon (DLC) for Strained p-Channel MOSFET

Ming Zhu, Yee-Chia Yeo, Tsung-Yang Liow, 2008, IEEE Electron Device Letters.

In Situ Surface Passivation and CMOS-Compatible Palladium–Germanium Contacts for Surface-Channel Gallium Arsenide MOSFETs

Ming Zhu, Yee-Chia Yeo, Chih-Hang Tung, 2008, IEEE Electron Device Letters.

New materials for post-Si computing: Ge and GeSn devices

Krishna C. Saraswat, Shinichi Takagi, Xiao Gong, 2014 .

Novel and cost-efficient single metallic silicide integration solution with dual Schottky-barrier achieved by aluminum inter-diffusion for FinFET CMOS technology with enhanced performance

Guo-Qiang Lo, Yee-Chia Yeo, Tsung-Yang Liow, 2008, 2008 Symposium on VLSI Technology.

Self-aligned contact metallization technology for III-V metal-oxide-semiconductor field effect transistors

Chun-Yen Chang, Xiao Gong, Yee-Chia Yeo, 2011 .

Modification of Molybdenum Gate Electrode Work Function via (La-, Al-Induced) Dipole Effect at High-$k/\hbox{SiO}_{2}$ Interface

Dim-Lee Kwong, Yee-Chia Yeo, D. Kwong, 2008, IEEE Electron Device Letters.

Enhancement of TFET performance using dopant profile-steepening implant and source dopant concentration engineering at tunneling junction

Yee-Chia Yeo, Genquan Han, Lu Fan, 2010, 2010 Silicon Nanoelectronics Workshop.

Performance enhancement of n-channel impact-ionization metal-oxide-semiconductor transistor by strain engineering

Guo-Qiang Lo, Yee-Chia Yeo, Ganesh S. Samudra, 2007 .

Dual-metal gate technology for deep-submicron CMOS transistors

Hongfa Luan, Dim-Lee Kwong, Pushkar Ranade, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

Controlled insulator-to-metal transformation in printable polymer composites with nanometal clusters.

Yee-Chia Yeo, Y. Yeo, P. Ho, 2007, Nature materials.

Spacer Removal Technique for Boosting Strain in n-Channel FinFETs With Silicon-Carbon Source and Drain Stressors

Ming Zhu, Yee-Chia Yeo, Tsung-Yang Liow, 2008, IEEE Electron Device Letters.

Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Yee-Chia Yeo, Y. Yeo, 2006, 2006 International SiGe Technology and Device Meeting.

Multiple-Gate In0.53Ga0.47As Channel n-MOSFETs with Self-Aligned Ni-InGaAs Contacts

Xiao Gong, Yee-Chia Yeo, Xingui Zhang, 2012 .

Relaxed and Strained Patterned Germanium-Tin Structures: A Raman Scattering Study

Wei Wang, Ran Cheng, Linfeng Sun, 2013 .

Electronic band structures and effective-mass parameters of wurtzite GaN and InN

Tow Chong Chong, Yee-Chia Yeo, T. Chong, 1998 .

III–V Multiple-Gate Field-Effect Transistors With High-Mobility $\hbox{In}_{0.7}\hbox{Ga}_{0.3}\hbox{As}$ Channel and Epi-Controlled Retrograde-Doped Fin

Luping Shi, Xiao Gong, Yee-Chia Yeo, 2011, IEEE Electron Device Letters.

A Self-Aligned Ni-InGaAs Contact Technology for InGaAs Channel n-MOSFETs

Xiao Gong, Yee-Chia Yeo, Ivana, 2012 .

A new silane-ammonia surface passivation technology for realizing inversion-type surface-channel GaAs N-MOSFET with 160 nm gate length and high-quality metal-gate/high-k dielectric stack

Guo-Qiang Lo, Ming Zhu, Luping Shi, 2008, 2008 IEEE International Electron Devices Meeting.

n-MOSFET With Silicon–Carbon Source/Drain for Enhancement of Carrier Transport

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2007, IEEE Transactions on Electron Devices.

Strained N-Channel FinFETs with 25 nm Gate Length and Silicon-Carbon Source/Drain Regions for Performance Enhancement

Yee-Chia Yeo, Tsung-Yang Liow, N. Balasubramanian, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Effects of high-/spl kappa/ dielectrics on the workfunctions of metal and silicon gates

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Analysis of the Effects of Fringing Electric Field on FinFET Device Performance and Structural Optimization Using 3-D Simulation

Hui Zhao, S.C. Rustagi, Yee-Chia Yeo, 2008, IEEE Transactions on Electron Devices.

Two Silicon Nitride Technologies for Post

Hongfa Luan, Dim-Lee Kwong, Chenming Hu, 2001 .

Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications

Yee-Chia Yeo, Ganesh S. Samudra, Eng-Huat Toh, 2008 .

Drive-Current Enhancement in FinFETs Using Gate-Induced Stress

Yee-Chia Yeo, Tsung-Yang Liow, Chih-Hang Tung, 2006, IEEE Electron Device Letters.

III–V MOSFETs with a new self-aligned contact

Chun-Yen Chang, Xiao Gong, Yee-Chia Yeo, 2010, 2010 Symposium on VLSI Technology.

Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel

Vivek Subramanian, Jeffrey Bokor, Chenming Hu, 2002 .

A Variational Approach to the Two-Dimensional Nonlinear Poisson's Equation for the Modeling of Tunneling Transistors

Chun-Huat Heng, Yee-Chia Yeo, G. Samudra, 2008, IEEE Electron Device Letters.

PBTI characteristics of N-channel tunneling field effect transistor with HfO2 gate dielectric: New insights and physical model

Bin Liu, Yee-Chia Yeo, Genquan Han, 2012, Proceedings of Technical Program of 2012 VLSI Technology, System and Application.

Suppression of dark current in germanium-tin on silicon p-i-n photodiode by a silicon surface passivation technique.

Wei Wang, Gengchiau Liang, Xiao Gong, 2015, Optics express.

Carrier Backscattering Characteristics of Strained N-MOSFET Featuring Silicon-Carbon Source/Drain Regions

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2006, 2006 European Solid-State Device Research Conference.

In-situ gallium-doping for forming p+ germanium-tin and application in germanium-tin p-i-n photodetector

Wei Wang, Yee-Chia Yeo, Eng Soon Tok, 2016 .

Metal gate technology for nanoscale transistors—material selection and process integration issues

Yee-Chia Yeo, Y. Yeo, 2004 .

Development of GaN Power IC Platform and All GaN DC-DC Buck Converter IC

Bo Zhang, Yee-Chia Yeo, Ruize Sun, 2019, 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD).

Germanium–Tin P-Channel Tunneling Field-Effect Transistor: Device Design and Technology Demonstration

Wei Wang, Xiao Gong, Yee-Chia Yeo, 2013, IEEE Transactions on Electron Devices.

Finite-element study of strain distribution in transistor with silicon–germanium source and drain regions

Yee-Chia Yeo, Y. Yeo, Jisong Sun, 2005 .