Ahmed Louri

发表

Reconfigurable and adaptive photonic networks for high-performance computing systems.

Avinash Kodi, Ahmed Louri, Avinash Karanth Kodi, 2009, Applied optics.

Design of a high-speed optical interconnect for scalable shared memory multiprocessors

Ahmed Louri, Avinash Karanth Kodi, A. Louri, 2004, Proceedings. 12th Annual IEEE Symposium on High Performance Interconnects.

EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs

Ahmed Louri, Hao Zheng, 2018, IEEE Computer Architecture Letters.

Energy-Efficient Multiply-and-Accumulate using Silicon Photonics for Deep Neural Networks

Ahmed Louri, Kyle Shiflett, Avinash Karanth, 2020, 2020 IEEE Photonics Conference (IPC).

PIXEL: Photonic Neural Network Accelerator

Ahmed Louri, Kyle Shiflett, Avinash Karanth, 2020, 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Optical Arithmetic Using Signed-Digit Symbolic Substitution

Kai Hwang, Ahmed Louri, 1988, ICPP.

10T and 8T Full Adders Based on Ambipolar XOR Gates with SB-FinFETs

Ahmed Louri, Hao Xin, Savas Kaya, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

mm-Wave tunable colpitts oscillators based on FinFETs

Avinash Kodi, Ahmed Louri, Hao Xin, 2017, 2017 IEEE 18th Wireless and Microwave Technology Conference (WAMICON).

Microcanonical mean field annealing: a new algorithm for increasing the convergence speed of mean field annealing

Ahmed Louri, N. J. Lee, 1991, [Proceedings] 1991 IEEE International Joint Conference on Neural Networks.

Ultracompact and Low-Power Logic Circuits via Workfunction Engineering

Ahmed Louri, Savas Kaya, Avinash Karanth, 2019, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth, 2019, IEEE Transactions on Computers.

Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs

Avinash Kodi, Ahmed Louri, Hao Xin, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

Workload assignment considering NBTI degradation in multicore systems

Roman L. Lysecky, Janet Roveda, Ahmed Louri, 2014, ACM J. Emerg. Technol. Comput. Syst..

Scalable Power-Efficient Kilo-Core Photonic-Wireless NoC Architectures

Ahmed Louri, Savas Kaya, Avinash Kodi, 2018, 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS).

LEAD: Learning-enabled Energy-Aware Dynamic Voltage/frequency scaling in NoCs

Avinash Kodi, Ahmed Louri, Razvan Bunescu, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Special Issue on Network-on-Chips (NoCs)

Ahmed Louri, Avinash Karanth Kodi, 2010, J. Parallel Distributed Comput..

RAPID for high-performance computing systems: architecture and performance evaluation.

Ahmed Louri, Avinash Karanth Kodi, A. Louri, 2006, Applied optics.

Parallel electro-optical rule-based system for fast execution of expert systems

Ahmed Louri, Jongwhoa Na, A. Louri, 1992, Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences.

Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems

Ahmed Louri, Avinash Karanth Kodi, 2007, Proceedings of the 2007 ACM/IEEE Conference on Supercomputing (SC '07).

Efficient Dynamic Bandwidth Re-allocation in Photonic Networks using SOI-based Microring Resonators

Avinash Kodi, Ahmed Louri, 2008 .

Adaptive Channel Buffers in On-Chip Interconnection Networks— A Power and Performance Analysis

Ahmed Louri, Avinash Karanth Kodi, Ashwini Sarathy, 2008, IEEE Transactions on Computers.

Design of high bandwidth photonic NoC architectures using optical multilevel signaling

Ahmed Louri, Tzyy-Juin Kao, 2016, 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth, 2019, IEEE Transactions on Computers.

Scalable three-dimensional optical interconnects for data centers

Avinash Kodi, Ahmed Louri, Randy Morris, 2017 .

Optical architecture using multiwavelength and polarization encoding for high-speed parallel relational database processing

Ahmed Louri, Peng Yin Choo, Abram Detofsky, 1998, Other Conferences.

A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures

Ahmed Louri, Hao Zheng, Ke Wang, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Guided-wave multiwavelength Content-Addressable Memory (CAM) processing module for database and networking applications

Ahmed Louri, Peng Yin Choo, 2001 .

Utility-based resource management in an oversubscribed energy-constrained heterogeneous environment executing parallel applications

Gregory A. Koenig, Neena Imam, Anthony A. Maciejewski, 2019, Parallel Comput..

DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs

Ahmed Louri, Md Farhadur Reza, Yuechen Chen, 2018, 2018 IEEE 36th International Conference on Computer Design (ICCD).

An Optical Content-Adressable Parallel Processor for Fast Searching and Retrieving

Ahmed Louri, 1991, PARLE.

Dynamic error mitigation in NoCs using intelligent prediction techniques

Ahmed Louri, Travis Boraten, Avinash Kodi, 2016, 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Machine learning enabled power-aware Network-on-Chip design

Ahmed Louri, Avinash Karanth Kodi, Dominic DiTomaso, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

An Optical Data-Flow Computer

Ahmed Louri, A. Louri, 1990, Optics & Photonics.

Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs)

Janet Roveda, Ahmed Louri, Avinash Karanth Kodi, 2009, 2009 10th International Symposium on Quality Electronic Design.

Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning

Ahmed Louri, Kyle Shiflett, Avinash Karanth, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators

Avinash Kodi, Ahmed Louri, C. Kochar, 2007 .

High-speed Interchip and Interboard Communications

Ahmed Louri, Hongki Sung, 1994 .

A spanning bus connected hypercube: a new scalable optical interconnection network for multiprocessors and massively parallel systems

Ahmed Louri, Costas Neocleous, 1997 .

An online quality management framework for approximate communication in network-on-chips

Ahmed Louri, Yuechen Chen, A. Louri, 2019, ICS.

A symbolic substitution based parallel architecture and algorithms for high-speed parallel processing

Ahmed Louri, 1990, CSC '90.

Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2014, IEEE Transactions on Computers.

Three-dimensional optical architecture and data-parallel algorithms for massively parallel computing

Ahmed Louri, A. Louri, 1991, IEEE Micro.

A Simulation Environment for Intelligent Machine Architectures

Bernard P. Zeigler, Ahmed Louri, B. Zeigler, 1993, J. Parallel Distributed Comput..

Workload capacity considering NBTI degradation in multi-core systems

Roman L. Lysecky, Janet Roveda, Ahmed Louri, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures

Janet Roveda, Ahmed Louri, Avinash Karanth Kodi, 2009, 2009 Asia and South Pacific Design Automation Conference.

Parallel optical interconnection network for SMPs

Avinash Kodi, Ahmed Louri, 2003 .

DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning

Ahmed Louri, Mark Clark, Avinash Karanth, 2020, 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS).

A New Dynamic Bandwidth Re-Allocation Technique in Optically Interconnected High-Performance Computing Systems

Ahmed Louri, Avinash Karanth Kodi, 2006, 14th IEEE Symposium on High-Performance Interconnects (HOTI'06).

4-Input NAND and NOR Gates Based on Two Ambipolar Schottky Barrier FinFETs

Ahmed Louri, Savas Kaya, Avinash Karanth, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

CURE: A High-Performance, Low-Power, and Reliable Network-on-Chip Design Using Reinforcement Learning

Ahmed Louri, Ke Wang, A. Louri, 2020, IEEE Transactions on Parallel and Distributed Systems.

A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core Systems

Ahmed Louri, Pavan Poluri, 2015, IEEE Computer Architecture Letters.

Design of an optical content-addressable parallel processor with applications to fast searching and information retrieval

Ahmed Louri, 1991, [1991] Proceedings. The Fifth International Parallel Processing Symposium.

nD-RAPID: a multidimensional scalable fault-tolerant optoelectronic interconnection for high-performance computing systems

Avinash Kodi, Ahmed Louri, Avinash Karanth Kodi, 2007 .

Design of large-scale symmetric multiprocessors (SMPs) using parallel optical interconnects

Avinash Kodi, Ahmed Louri, 2003 .

Switchless Photonic Architecture for Parallel Computers

Avinash Kodi, Ahmed Louri, Avinash Karanth Kodi, 2005 .

Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators

Ahmed Louri, Avinash Karanth Kodi, Chander Kochar, 2007, 15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007).

A free space optical crossbar switch using wavelength division multiplexing and vertical-cavity surface-emitting lasers

Ahmed Louri, B. Webb, A. Louri, 1998, Proceedings. Fifth International Conference on Massively Parallel Processing (Cat. No.98EX182).

A Methodology for Cognitive NoC Design

Ahmed Louri, Wo-Tak Wu, A. Louri, 2016, IEEE Computer Architecture Letters.

Media access protocols for a scalable optical interconnection network

Ahmed Louri, Thomas S. Jones, T. Jones, 1998, Proceedings. 1998 International Conference on Parallel Processing (Cat. No.98EX205).

Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2013, 2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Efficient optical implementation method for symbolic substitution logic based on shadow casting

Ahmed Louri, 1989 .

Resource Management in Heterogeneous Parallel Computing Environments with Soft and Hard Deadlines

Anthony A. Maciejewski, Salim Hariri, Ahmed Louri, 2015 .

A Multi-Wavelength Optical Content-Addressable Parallel Processor (MW-OCAPP) for High-Speed Parallel Relational Database Processing: Architectural Concepts and Preliminary Experimental System

Ahmed Louri, Peng Yin Choo, Abram Detofsky, 1999 .

iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures

Ahmed Louri, Avinash Karanth Kodi, Ashwini Sarathy, 2008, 2008 International Symposium on Computer Architecture.

Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture.

Parallel Electro-Optical Rule-Based System for Fast Execution of Expert Systems

Ahmed Louri, Jongwhoa Na, 1992, [1992] Proceedings the 19th Annual International Symposium on Computer Architecture.

A hypercube-based optical interconnection network: a solution to the scalability requirements for massively parallel computers

Ahmed Louri, Hongki Sung, 1994, First International Workshop on Massively Parallel Processing Using Optical Interconnections.

Y-junction based addressing in optical symmetric multiprocessor networks

Avinash Kodi, Ahmed Louri, 2001, LEOS 2001. 14th Annual Meeting of the IEEE Lasers and Electro-Optics Society (Cat. No.01CH37242).

Limit of Hardware Solutions for Self-Protecting Fault-Tolerant NoCs

Ahmed Louri, Jacques Henri Collet, Avinash Karanth, 2019, ACM J. Emerg. Technol. Comput. Syst..

A bit-plane architecture for optical computing with two-dimensional symbolic substitution

Kai Hwang, Ahmed Louri, 1988, ISCA '88.

System simulation methodology of optical interconnects for high- performance computing systems

Avinash Kodi, Ahmed Louri, 2007 .

Optisim: A System Simulation Methodology for Optically Interconnected HPC Systems

Ahmed Louri, Avinash Karanth Kodi, 2008, IEEE Micro.

An Improved Router Design for Reliable On-Chip Networks

Ahmed Louri, Pavan Poluri, A. Louri, 2014, 2014 IEEE 28th International Parallel and Distributed Processing Symposium.

Design and evaluation of fault-tolerant interleaved memory systems

Ahmed Louri, Sy-Yen Kuo, Sheng-Chiech Liang, 1994, Proceedings of IEEE 3rd Asian Test Symposium (ATS).

Co-design of channel buffers and crossbar organizations in NoCs architectures

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A parallel architecture and algorithms for optical computing

Ahmed Louri, 1989 .

QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers

Ahmed Louri, Avinash Karanth Kodi, Dominic DiTomaso, 2014, 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA).

3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

A new compiler-directed cache coherence scheme for shared memory multiprocessors with fast and parallel explicit invalidation

Ahmed Louri, Hongki Sung, 1992, ISCA.

An optical associative parallel processor for high-speed database processing. Theoretical concepts and experimental results

Ahmed Louri, James A. Hatch, 1994, Computer.

An Energy-Efficient Network-on-Chip Design using Reinforcement Learning

Ahmed Louri, Hao Zheng, A. Louri, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Reduced Precision Redundancy for Reliable Processing of Data

Ke Chen, Pedro Reviriego, Fabrizio Lombardi, 2019 .

Hierarchical optical ring interconnection (HORN): a scalable interconnection-network for multiprocessors and massively parallel systems

Ahmed Louri, R. Gupta, A. Louri, 1996, Proceedings of Massively Parallel Processing Using Optical Interconnections.

A preliminary version of an optical data-flow architecture

Ahmed Louri, A. Louri, 1990, Twenty-Third Annual Hawaii International Conference on System Sciences.

An optical interconnection network and a modified snooping protocol for the design of large-scale symmetric multiprocessors (SMPs)

Ahmed Louri, Avinash Karanth Kodi, 2004, IEEE Transactions on Parallel and Distributed Systems.

Scalable Optical Interconnection Networks for Large-Scale Parallel Computers

Ahmed Louri, Brent Weech, A. Louri, 1998 .

Parallel optical interconnection network for address transactions in large-scale cache coherent symmetric multiprocessors

Avinash Kodi, Ahmed Louri, 2003 .

Low-power low-area network-on-chip architecture using adaptive electronic link buffers

Avinash Kodi, Ahmed Louri, Ashwini Sarathy, 2008 .

Sustainability in Network-on-Chips by Exploring Heterogeneity in Emerging Technologies

Ahmed Louri, Hao Xin, Savas Kaya, 2019, IEEE Transactions on Sustainable Computing.

A constant-time parallel sorting algorithm and its optical implementation

Ahmed Louri, Jongwhoa Na, James A. Hatch, 1995, IEEE Micro.

OWN: Optical and Wireless Network-on-Chip for Kilo-core Architectures

Ahmed Louri, Avinash Karanth Kodi, Matthew Kennedy, 2015, 2015 IEEE 23rd Annual Symposium on High-Performance Interconnects.

Performance Considerations Relating to the Design of Interconnection Networks for Multiprocessors Systems

Ahmed Louri, Earl Hokens, A. Louri, 1993, 1993 International Conference on Parallel Processing - ICPP'93.

3D optical interconnects for high-speed interchip and interboard communications

Ahmed Louri, Hongki Sung, 1994, Computer.

Optical Multilevel Signaling for High Bandwidth and Power-Efficient On-Chip Interconnects

Ahmed Louri, Tzyy-Juin Kao, 2015, IEEE Photonics Technology Letters.

IntelliNoC: A Holistic Design Framework for Energy-Efficient and Reliable On-Chip Communication for Manycores

Ahmed Louri, Razvan C. Bunescu, Ke Wang, 2019, 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA).

Reconfigurable all-photonic inter-rack interconnect for data-centers

Ahmed Louri, Priyankar Roychowdhury, 2017 .

A Multi-Wavelength Optical Content-Addressable Parallel Processor (MW-OCAPP) for High-Speed Parallel Relational Database Processing: Architectural Concepts and Preliminary Experimental System

Ahmed Louri, Abram Detofsky, Peng Yin Choo, 1999, IPPS/SPDP Workshops.

An optical multi-mesh hypercube: a scalable optical interconnection network for massively parallel computing

Ahmed Louri, Hongki Sung, A. Louri, 1994 .

Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth Kodi, 2015, IEEE Transactions on Computers.

Nanophotonic Interconnects and 3D-stacked Technology for Future Many-core Architectures

Ahmed Louri, Xiang Zhang, 2009 .

A Spanning Multichannel Linked Hypercube: A Gradually Scalable Optical Interconnection Network for Massively Parallel Computing

Ahmed Louri, Costas Neocleous, Brent Weech, 1998, IEEE Trans. Parallel Distributed Syst..

Tackling Permanent Faults in the Network-on-Chip Router Pipeline

Ahmed Louri, Pavan Poluri, 2013, 2013 25th International Symposium on Computer Architecture and High Performance Computing.

Editorial from the Incoming Editor-in-Chief

Ahmed Louri, 2019, IEEE Trans. Computers.

A bit-plane architecture and 2-d symbolic substitution algorithms for optical computing

Kai Hwang, Ahmed Louri, 1988 .

Reconfigurable Optical and Wireless (R-OWN) Network-on-Chip for High Performance Computing

Ahmed Louri, Avinash Karanth Kodi, Md. Ashif I. Sikder, 2016, NANOCOM.

NBTI aware workload balancing in multi-core systems

Janet Roveda, Ahmed Louri, Avinash Karanth Kodi, 2009, 2009 10th International Symposium on Quality Electronic Design.

TSA-NoC: Learning-Based Threat Detection and Mitigation for Secure Network-on-Chip Architecture

Ahmed Louri, Hao Zheng, Ke Wang, 2020, IEEE Micro.

A scalable architecture for distributed shared memory multiprocessors using optical interconnects

Ahmed Louri, Avinash Karanth Kodi, A. Louri, 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

Sub-THz Tunable Push-Push Oscillators with FinFETs for Wireless NoCs

Ahmed Louri, Hao Xin, Savas Kaya, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

ROBUST: a new self-healing fault-tolerant NoC router

Ahmed Louri, Jacques Henri Collet, Pavan Poluri, 2011, NoCArc '11.

Design of a Concentrated Torus Topology with Channel Buffers and Efficient Crossbars in NoCs

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2013, 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum.

State of the Journal

Ahmed Louri, 2020, IEEE Trans. Computers.

Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors

Avinash Kodi, Ahmed Louri, 2005, IEEE Micro.

On-Chip photonic interconnects for scalable multi-core architectures

Xiang Zhang, Ahmed Louri, Avinash Karanth Kodi, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

Channel allocation, power budget and bit error rate in hierarchical optical ring interconnection network (HORN)

Ahmed Louri, T. S. Jones, 1998, Proceedings. Fifth International Conference on Massively Parallel Processing (Cat. No.98EX182).

An efficient 3D optical implementation of binary de Bruijn networks with applications to massively parallel computing

Ahmed Louri, Hongki Sung, A. Louri, 1995, Proceedings of Second International Workshop on Massively Parallel Processing Using Optical Interconnections.

A Compiler Directed Cache Coherence Scheme with Fast and Parallel Explicit Invalidation

Ahmed Louri, Hongki Sung, 1992, ICPP.

Agile: A Learning-Enabled Power and Performance-Efficient Network-on-Chip Design

Ahmed Louri, Hao Zheng, A. Louri, 2022, IEEE Transactions on Emerging Topics in Computing.

LEAD: Learning-enabled Energy-Aware Dynamic Voltage/frequency scaling in NoCs

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth Kodi, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Optical Multiplication And Division Using Modified-Signed-Digit Symbolic Substitution

Kai Hwang, Ahmed Louri, 1989 .

The equivalency processing parallel photonic integrated circuit (EP/sup 3/IC), a parallel digital equivalence search module

Ahmed Louri, Abram Detofsky, Peng Yin Choo, 2000, Proceedings 29th Applied Imagery Pattern Recognition Workshop.

Program committee

Ahmed Louri, Derek Chiou, Hyesoon Kim, 2018, 2010 International Conference on e-Business (ICE-B).

Parallel electro-optical rule-based system for fast execution of expert systems

Ahmed Louri, Jongwhoa Na, 1992, ISCA.

Learning-Based Quality Management for Approximate Communication in Network-on-Chips

Ahmed Louri, Yuechen Chen, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Extending the Power-Efficiency and Performance of Photonic Interconnects for Heterogeneous Multicores with Machine Learning

Ahmed Louri, Razvan C. Bunescu, Avinash Karanth Kodi, 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).

ALPHA: A Learning-Enabled High-Performance Network-on-Chip Router Design for Heterogeneous Manycore Architectures

Ahmed Louri, Yuan Li, A. Louri, 2020, IEEE Transactions on Sustainable Computing.

New Symbolic Substitution Algorithms For Optical Arithmetic Using Signed-Digit Representation

Kai Hwang, Ahmed Louri, 1988, Photonics West - Lasers and Applications in Science and Engineering.

A multilayer nanophotonic interconnection network for on-chip many-core communications

Xiang Zhang, Ahmed Louri, 2010, Design Automation Conference.

Parallel electro-optical rule-based system for fast execution of expert systems (abstract)

Ahmed Louri, Jongwhoa Na, 1992, ISCA '92.

A Holistic Dataflow-Inspired System Design

Guang R. Gao, Haitao Wei, Ahmed Louri, 2014, 2014 Fourth Workshop on Data-Flow Execution Models for Extreme Scale Computing.

SYMNET: an optical interconnection network for scalable high-performance symmetric multiprocessors.

Ahmed Louri, Avinash Karanth Kodi, A. Louri, 2003, Applied optics.

Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture

Ahmed Louri, Avinash Karanth Kodi, Ashwini Sarathy, 2007, ANCS '07.

Extending the Energy Efficiency and Performance With Channel Buffers, Crossbars, and Topology Analysis for Network-on-Chips

Ahmed Louri, Avinash Karanth Kodi, Randy Morris, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Introduction to the special issue on Networks-on-Chip (NoC) of the Journal of Parallel and Distributed Computing (JPDC)

Ahmed Louri, Avinash Karanth Kodi, 2011, J. Parallel Distributed Comput..

A Class of Highly Scalable Optical Crossbar-Connected Interconnection Networks (SOCNs) for Parallel Computing Systems

Ahmed Louri, Brian Webb, A. Louri, 2000, IEEE Trans. Parallel Distributed Syst..

A Parallel Architecture for Optical Computing

Kai Hwang, Ahmed Louri, 1987, PPSC.

Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors

Ahmed Louri, Pavan Poluri, A. Louri, 2016, IEEE Transactions on Parallel and Distributed Systems.

A new compiler-directed cache coherence scheme for shared memory multiprocessors with fast and parallel explicit invalidation (abstract)

Ahmed Louri, Hongki Sung, 1992, ISCA '92.

Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems

Ahmed Louri, Avinash Karanth Kodi, 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

An Approximate Communication Framework for Network-on-Chips

Ahmed Louri, Yuechen Chen, A. Louri, 2020, IEEE Transactions on Parallel and Distributed Systems.

Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects

Ahmed Louri, Avinash Karanth, Yuan Li, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

Bitwise Neural Network Acceleration Using Silicon Photonics

Ahmed Louri, Kyle Shiflett, Avinash Karanth, 2021, ACM Great Lakes Symposium on VLSI.

Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architectures

Ahmed Louri, Hao Zheng, Ke Wang, 2021, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

AdaPrune: An Accelerator-aware Pruning Technique for Sustainable CNN Accelerators

Ahmed Louri, Jiajun Li, 2021 .

A Technique for Approximate Communication in Network-on-Chips for Image Classification

Ahmed Louri, Yuechen Chen, Shanshan Liu, 2021 .

Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics

Ahmed Louri, Kyle Shiflett, Avinash Karanth, 2021, 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA).

GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Networks

Ahmed Louri, Avinash Karanth, Razvan Bunescu, 2021, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

CSCNN: Algorithm-hardware Co-design for CNN Accelerators using Centrosymmetric Filters

Ahmed Louri, Avinash Karanth, Razvan Bunescu, 2021, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

Stochastic Dividers for Low Latency Neural Networks

Pedro Reviriego, Ahmed Louri, Weiqiang Liu, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Ambipolar SB-FinFETs: A New Path to Ultra-Compact Sub-10 nm Logic Circuits

Ahmed Louri, Hao Xin, Savas Kaya, 2019, IEEE Transactions on Electron Devices.

A Design Methodology for Three-dimensional Space-invariant Hypercube Networks Using Graph Bipartitioning

Ahmed Louri, Hongki Sung, 1993 .

D Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration

Ahmed Louri, Avinash Karanth Kodi, Randy W. Morris, 2012 .