Sayeef Salahuddin

发表

Non-volatile spin switch for Boolean and non-Boolean logic

Supriyo Datta, Behtash Behin-Aein, Sayeef Salahuddin, 2012 .

Negative capacitance in ferroelectric materials and implications for steep transistors

Asif Khan, Sayeef Salahuddin, S. Salahuddin, 2014, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Analysis of thermal behaviors of Spin-Torque-Transfer RAM: A simulation study

Satish Kumar, Saibal Mukhopadhyay, Sayeef Salahuddin, 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).

QuantumTransport Simulation ofTunneling BasedSpinTorqueTransfer (STT) Devices: Design Tradeoffs andTorqueEfficiency

Sayeef Salahuddin, Deepanjan Datta, Prabhakar Srivastava, 2007 .

Basic Research Needs for Microelectronics: Report of the Office of Science Workshop on Basic Research Needs for Microelectronics, October 23 – 25, 2018

John Shalf, Dushan Boroyevich, Debdeep Jena, 2018 .

Solid-state physics: A new spin on spintronics

Sayeef Salahuddin, S. Salahuddin, 2013, Nature.

Ising Model Optimization Problems on a FPGA Accelerated Restricted Boltzmann Machine.

Lili Chen, Sayeef Salahuddin, Saavan Patel, 2020 .

Reducing signal-bias from MAD estimated noise level for DCT speech enhancement

Md. Kamrul Hasan, Sayeef Salahuddin, M. Rezwan Khan, 2004, Signal Process..

Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance—Part I: Model Description

Chenming Hu, Yogesh Singh Chauhan, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

Novel Cascadable Magnetic Majority Gates for Implementing Comprehensive Logic Functions

Min Song, Xiaofei Yang, Xuecheng Zou, 2018, IEEE Transactions on Electron Devices.

BSIM-IMG 102.8.0: independent multi-gate MOSFET compact model: technical manual

Ali M. Niknejad, Pragya Kushwaha, Yogesh Singh Chauhan, 2016 .

Reliability of Ferroelectric HfO2-based Memories: From MOS Capacitor to FeFET

Chenming Hu, Sayeef Salahuddin, Yu-Hung Liao, 2020, 2020 Device Research Conference (DRC).

The era of hyper-scaling in electronics

Suman Datta, Sayeef Salahuddin, Kai Ni, 2018, Nature Electronics.

Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs

Michael Niemier, Xiaobo Sharon Hu, Sayeef Salahuddin, 2020, ISCAS.

Novel All-Spin Devices

Supriyo Datta, Behtash Behin-Aein, Sayeef Salahuddin, 2010 .

Modeling of the self-heating in STTRAM and analysis of its impact on reliable memory operations

Satish Kumar, Saibal Mukhopadhyay, Sayeef Salahuddin, 2009, 2009 10th Annual Non-Volatile Memory Technology Symposium (NVMTS).

Nonvolatile memory design based on ferroelectric FETs

Narayanan Vijaykrishnan, Meng-Fan Chang, Xueqing Li, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Logically synthesized and hardware-accelerated restricted Boltzmann machines for combinatorial optimization and integer factorization pdf

Sayeef Salahuddin, Saavan Patel, Philip Canoza, 2020, Nature Electronics.

In quest of the next information processing substrate

Eric Pop, H.-S. Philip Wong, Michael T. Niemier, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes

Saibal Mukhopadhyay, Sayeef Salahuddin, Subho Chatterjee, 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

Negative Capacitance Transistors

Sayeef Salahuddin, Justin C. Wong, S. Salahuddin, 2018, Proceedings of the IEEE.

Design Paradigm for Robust Spin-Torque Transfer Magnetic RAM (STT MRAM) From Circuit/Architecture Perspective

Patrick Ndai, Ashish Goel, Jing Li, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Implementing p-bits With Embedded MTJ

Supriyo Datta, Sayeef Salahuddin, Kerem Yunus Camsari, 2017, IEEE Electron Device Letters.

Negative capacitance in a ferroelectric-dielectric heterostructure for ultra low-power computing

Sayeef Salahuddin, S. Salahuddin, 2012, Other Conferences.

Impact of Parasitic Capacitance and Ferroelectric Parameters on Negative Capacitance FinFET Characteristics

Chenming Hu, Sayeef Salahuddin, Sourabh Khandelwal, 2017, IEEE Electron Device Letters.

Combining Learned Representations for Combinatorial Optimization pdf

Sayeef Salahuddin, Saavan Patel, S. Salahuddin, 2019, ArXiv.

Memory leads the way to better computing.

H-S Philip Wong, Sayeef Salahuddin, H. P. Wong, 2015, Nature nanotechnology.

A Predictive Tunnel FET Compact Model With Atomistic Simulation Validation

Chenming Hu, Sayeef Salahuddin, Sourabh Khandelwal, 2017, IEEE Transactions on Electron Devices.

Full chip power benefits with negative capacitance FETs

Sung Kyu Lim, Asif I. Khan, Chenming Hu, 2017, 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Enabling Energy-Efficient Nonvolatile Computing With Negative Capacitance FET

Meng-Fan Chang, Xueqing Li, Suman Datta, 2017, IEEE Transactions on Electron Devices.

Electrothermal analysis of spin-transfer-torque random access memory arrays

Satish Kumar, Saibal Mukhopadhyay, Sayeef Salahuddin, 2013, JETC.

Performance assessment of partially unzipped carbon nanotube field-effect transistors

Youngki Yoon, Sayeef Salahuddin, S. Salahuddin, 2011, 2011 IEEE/ACM International Symposium on Nanoscale Architectures.

Ultrathin Ferroelectricity and Its Application in Advanced Logic and Memory Devices

Sayeef Salahuddin, S. Salahuddin, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Negative-Capacitance FinFET Inverter, Ring Oscillator, SRAM Cell, and Ft

Jia-Min Shieh, Chenming Hu, Wen-Cheng Chiu, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

Response Speed of Negative Capacitance FinFETs

Zoran Krivokapic, Chenming Hu, Sayeef Salahuddin, 2018, 2018 IEEE Symposium on VLSI Technology.

Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device With 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery

Chenming Hu, Sayeef Salahuddin, Ava J. Tan, 2017, IEEE Electron Device Letters.

Differential voltage amplification from ferroelectric negative capacitance

Michael Hoffmann, Sayeef Salahuddin, Ramamoorthy Ramesh, 2017, 1709.10451.

Effects of the Variation of Ferroelectric Properties on Negative Capacitance FET Characteristics

Asif Islam Khan, Chenming Hu, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

0.2V adiabatic NC-FinFET with 0.6mA/µm ION and 0.1nA/µm IOFF

Asif Khan, Chenming Hu, Sayeef Salahuddin, 2015, 2015 73rd Annual Device Research Conference (DRC).

Voltage-controlled ferroelastic switching in Pb(Zr0.2Ti0.8)O3 thin films.

Asif Islam Khan, Sayeef Salahuddin, Ramamoorthy Ramesh, 2015, Nano letters.

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Chenming Hu, Sayeef Salahuddin, Kai-Shin Li, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Deterministic Domain Wall Motion Orthogonal To Current Flow Due To Spin Orbit Torque

Jeffrey Bokor, Long You, Sayeef Salahuddin, 2014, Scientific Reports.

Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors

Hyunhyub Ko, Elena Plis, Sanjay Krishna, 2010, Nature.

Dense electron system from gate-controlled surface metal-insulator transition.

Sayeef Salahuddin, Joonki Suh, Hua Guo, 2012, Nano letters.

Dependence of intrinsic performance of transition metal dichalcogenide transistors on materials and number of layers at the 5 nm channel-length limit

Sayeef Salahuddin, Kartik Ganapathi, Varun Mishra, 2013, 2013 IEEE International Electron Devices Meeting.

Device design considerations for ultra-thin body non-hysteretic negative capacitance FETs

Chenming Hu, Sayeef Salahuddin, Chun Wing Yeung, 2013, 2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S).

Spin Transfer Torque as a Non-Conservative Pseudo-Field

Supriyo Datta, Sayeef Salahuddin, Deepanjan Datta, 2008 .

CMOS and Beyond: Extending CMOS with negative capacitance

Sayeef Salahuddin, Asif Khan, S. Salahuddin, 2015 .

Quantitative model for TMR and spin-transfer torque in MTJ devices

Supriyo Datta, Behtash Behin-Aein, Sayeef Salahuddin, 2010, 2010 International Electron Devices Meeting.

A Spin–Orbit‐Torque Memristive Device

Jeongmin Hong, Bernard Dieny, Xin Li, 2019, Advanced Electronic Materials.

Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer

Chenming Calvin Hu, Sayeef Salahuddin, Edward Yi Chang, 2014, IEEE Electron Device Letters.

How good can monolayer MoS₂ transistors be?

Youngki Yoon, Sayeef Salahuddin, Kartik Ganapathi, 2011, Nano letters.

New Mobility Model for Accurate Modeling of Transconductance in FDSOI MOSFETs

Josef Watts, Chenming Hu, Pragya Kushwaha, 2018, IEEE Transactions on Electron Devices.

Analysis of InAs vertical and lateral band-to-band tunneling transistors: Leveraging vertical tunneling for improved performance

Youngki Yoon, Sayeef Salahuddin, Kartik Ganapathi, 2010 .

BSIM-CMG 110.0.0: Multi-gate MOSFET compact model: technical manual

Ali M. Niknejad, Chenming Hu, Chung-Hsun Lin, 2014 .

Single crystal functional oxides on silicon

Asif Islam Khan, Chenming Hu, Long You, 2015, Nature Communications.

Use of negative capacitance to provide a sub-threshold slope lower than 60 mV/decade

Supriyo Datta, Sayeef Salahuddin, 2007 .

Electrical detection of spin excitations

Supriyo Datta, Sayeef Salahuddin, S. Datta, 2006 .

Self-consistent simulation of quantum transport and magnetization dynamics in spin-torque based devices

Supriyo Datta, Sayeef Salahuddin, S. Datta, 2006 .

Room-temperature negative capacitance in a ferroelectric-dielectric superlattice heterostructure.

Sayeef Salahuddin, Ramamoorthy Ramesh, Jayakanth Ravichandran, 2014, Nano letters.

Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance—Part II: Model Validation

Chenming Hu, Yogesh Singh Chauhan, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

Sustained Sub-60 mV/decade Switching via the Negative Capacitance Effect in MoS2 Transistors.

Sayeef Salahuddin, Sourabh Khandelwal, Yuh-Chen Lin, 2017, Nano letters.

Compact models of negative-capacitance FinFETs: Lumped and distributed charge models

Chenming Hu, Sayeef Salahuddin, Sourabh Khandelwal, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

NCFET Design Considering Maximum Interface Electric Field

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2018, IEEE Electron Device Letters.

Negative Capacitance, n-Channel, Si FinFETs: Bi-directional Sub-60 mV/dec, Negative DIBL, Negative Differential Resistance and Improved Short Channel Effect

Hong Zhou, Chenming Hu, Sayeef Salahuddin, 2018, 2018 IEEE Symposium on VLSI Technology.

Negative Capacitance in Short-Channel FinFETs Externally Connected to an Epitaxial Ferroelectric Capacitor

Asif Islam Khan, Chenming Hu, Sayeef Salahuddin, 2016, IEEE Electron Device Letters.

Electrically induced, non-volatile, metal insulator transition in a ferroelectric-controlled MoS2 transistor

Sayeef Salahuddin, Ramamoorthy Ramesh, Justin C. Wong, 2017 .

Spatially resolved steady-state negative capacitance

Christopher T. Nelson, Jorge Íñiguez, Sayeef Salahuddin, 2019, Nature.

Work Function Engineering for Performance Improvement in Leaky Negative Capacitance FETs

Asif Islam Khan, Sayeef Salahuddin, Ujwal Radhakrishna, 2017, IEEE Electron Device Letters.

Engineering Negative Differential Resistance in NCFETs for Analog Applications

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2018, IEEE Transactions on Electron Devices.

Negative Capacitance Behavior in a Leaky Ferroelectric

Asif Islam Khan, Dimitri A. Antoniadis, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

Barrier-free tunneling in a carbon heterojunction transistor

Youngki Yoon, Sayeef Salahuddin, 2010 .

Unified Compact Model Covering Drift-Diffusion to Ballistic Carrier Transport

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2016, IEEE Electron Device Letters.