S. Ando

A 1.2 W 2.16 GOPS/720 MFLOPS embedded superscalar microprocessor for multimedia applications

H. Kubosawa, H. Takahashi, S. Ando, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A 2.5 GFLOPS 6.5 million polygons per second 4-way VLIW geometry processor with SIMD instructions and a software bypass mechanism

H. Nakayama, H. Saito, H. Kubosawa, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

Fabrication of Double-Gate Thin-Film SOI MOSFETs Using Wafer Bonding and Polishing

Tetsu Tanaka, S. Ando, Yoshihiro Arimoto, 1991 .

Analysis of p/sup +/ poly Si double-gate thin-film SOI MOSFETs

Tetsu Tanaka, S. Ando, Hiroshi Horie, 1991, International Electron Devices Meeting 1991 [Technical Digest].

A 0.4 /spl mu/m 1.4 ns 32b dynamic adder using non-precharge multiplexers and reduced precharge voltage technique

A. Inoue, S. Ando, Y. Asada, 1995, Digest of Technical Papers., Symposium on VLSI Circuits..

Dielectrically encapsulated trench capacitor cell

T. Ema, S. Ando, N. Higaki, 1986, 1986 International Electron Devices Meeting.

A Capacitance-Coupled Bit Line Cell

T. Nakamura, S. Ando, T. Yabu, 1985, IEEE Journal of Solid-State Circuits.