Jose Manuel Mendias

发表

HW-SW emulation framework for temperature-aware design in MPSoCs

Luca Benini, Giovanni De Micheli, Román Hermida, 2008, TODE.

Performance-driven scheduling of behavioural specifications

Jose Manuel Mendias, María C. Molina, Rafael Ruiz-Sautua, 2009, Integr..

Algebraic support for transformational hardware allocation

Román Hermida, Jose Manuel Mendias, Milagros Fernández, 1996, Proceedings ED&TC European Design and Test Conference.

A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip

Luca Benini, Giovanni De Micheli, David Atienza, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Multi-processor operating system emulation framework with thermal feedback for systems-on-chip

Luca Benini, Fernando Rincón Calle, Giovanni De Micheli, 2007, GLSVLSI '07.

Multiple-precision circuits allocation independent of data-objects length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level

Rudy Lauwereins, Francky Catthoor, David Atienza, 2003, PATMOS.

A novel approach for network on chip emulation

Luca Benini, Giovanni De Micheli, Román Hermida, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Power optimization in heterogenous datapaths

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2011, 2011 Design, Automation & Test in Europe.

A global approach to improve conditional hardware reuse in high-level synthesis

Román Hermida, Jose Manuel Mendias, Olga Peñalba, 2002, J. Syst. Archit..

Garbage collector refinement for new dynamic multimedia applications on embedded systems

Francisco Tirado, Francky Catthoor, David Atienza, 2004, Eighth Workshop on Interaction between Compilers and Computer Architectures, 2004. INTERACT-8 2004..

Behavioural bitwise scheduling based on computational effort balancing

Román Hermida, Jose Manuel Mendias, María C. Molina, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Subword Switching Activity Minimization to Optimize Dynamic Power Consumption

Jose Manuel Mendias, Alberto A. Del Barrio, María C. Molina, 2009, IEEE Design & Test of Computers.

A complete network-on-chip emulation framework

Giovanni De Micheli, Román Hermida, Francky Catthoor, 2005, Design, Automation and Test in Europe.

Efficient verification of scheduling, allocation and binding in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis

Román Hermida, Jose Manuel Mendias, Alberto A. Del Barrio, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, PATMOS.

Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis

Jose Manuel Mendias, María C. Molina, Rafael Ruiz-Sautua, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Multispeculative additive trees in High-Level Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Dynamic memory management design methodology for reduced memory footprint in multimedia and wireless network applications

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices

Rudy Lauwereins, Francky Catthoor, David Atienza, 2004, 2004 IEEE International Conference on Multimedia and Expo (ICME) (IEEE Cat. No.04TH8763).

Optimization of equational specifications using genetic techniques

José Ignacio Hidalgo, Román Hermida, Jose Manuel Mendias, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Direct memory access usage optimization in network applications for reduced memory latency and energy consumption

Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris, 2009, J. Embed. Comput..

Bit-level scheduling of heterogeneous behavioural specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs

Román Hermida, David Atienza, Jose Manuel Mendias, 2005, PARCO.

A unified algorithm for mutual exclusiveness identification

Román Hermida, Jose Manuel Mendias, Olga Peñalba, 1999, Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium.

Memory-access-aware data structure transformations for embedded software with dynamic data accesses

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An integrated hardware/software approach for run-time scratchpad management

Luca Benini, Paul Marchal, Francky Catthoor, 2004, Proceedings. 41st Design Automation Conference, 2004..

Using Speculative Functional Units in high level synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Area Optimization of Multi-Cycle Operators in High-Level Synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Source code transformation to improve conditional hardware reuse

Román Hermida, Jose Manuel Mendias, Olga Peñalba, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Placement of Linked Dynamic Data Structures over Heterogeneous Memories in Embedded Systems

Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris, 2015, TECS.

Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, WWIC.

Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications

Chantal Ykman-Couvreur, Geert Deconinck, Francky Catthoor, 2003, J. VLSI Signal Process..

A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework

Luca Benini, Giovanni De Micheli, David Atienza, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2005, WWIC.

Maximizing conditional reuse by pre-synthesis transformations

Román Hermida, Jose Manuel Mendias, Olga Peñalba, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Correct high-level synthesis: a formal perspective

Román Hermida, Jose Manuel Mendias, 1998, Proceedings Design, Automation and Test in Europe.

Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information

Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris, 2008, 2008 Asia and South Pacific Design Automation Conference.

Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems

Luca Benini, Francky Catthoor, David Atienza, 2006, Integr..

Arrival time aware scheduling to minimize clock cycle length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Automated Exploration of Pareto-optimal Configurations in Parameterized Dynamic Memory Allocation for Embedded Systems

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Multispeculative Addition Applied to Datapath Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems

Francisco Tirado, Francky Catthoor, David Atienza, 2005, PATMOS.

A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2013, Integr..

Reducing memory accesses with a system-level design methodology in customized dynamic memory management

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, 2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004..

Behavioural transformation to improve circuit performance in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, Design, Automation and Test in Europe.

A study about the efficiency of formal high-level synthesis applied to verification

Román Hermida, Jose Manuel Mendias, Olga Peñalba, 2002, Integr..

Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption

Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris, 2007, PATMOS.

Improving circuit performance with multispeculative additive trees in high-level synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2014, Microelectron. J..

Behavioural scheduling to balance the bit-level computational effort

Román Hermida, Jose Manuel Mendias, María C. Molina, 2004, IEEE Computer Society Annual Symposium on VLSI.

Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, J. Syst. Archit..

Systematic design flow for dynamic data management in visual texture decoder of MPEG-4

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Execution condition analysis in high level synthesis: a unified approach

Jose Manuel Mendias, María C. Molina, Olga Peñalba, 2000, ISSS '00.

High-level synthesis of multiple-precision circuits independent of data-objects length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, DAC '02.

High-level allocation to minimize internal hardware wastage [high-level synthesis]

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Bitwise scheduling to balance the computational cost of behavioral specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Applying speculation techniques to implement functional units

Román Hermida, Francisco Tirado, Jose Manuel Mendias, 2008, 2008 IEEE International Conference on Computer Design.

Pre-synthesis Optimization of Multiplications to Improve Circuit Performance

Román Hermida, Jose Manuel Mendias, María C. Molina, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Systematic dynamic memory management design methodology for reduced memory footprint

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2006, TODE.

Formal techniques for hardware allocation

Román Hermida, Jose Manuel Mendias, Milagros Fernández, 1997, Proceedings Tenth International Conference on VLSI Design.

Transformation of Equational Specification by Means of Genetic Programming

José Ignacio Hidalgo, Román Hermida, Jose Manuel Mendias, 2002, EuroGP.

Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems

Francky Catthoor, David Atienza, Jose Manuel Mendias, 2004, PATMOS.

Software metadata: Systematic characterization of the memory behaviour of dynamic applications

Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris, 2010, J. Syst. Softw..

Bit-level allocation of multiple-precision specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Performance-driven read-after-write dependencies softening in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..