R. Singanamalla

A Low-Power Multi-Gate FET CMOS Technology with 13.9ps Inverter Delay, Large-Scale Integrated High Performance Digital Circuits and SRAM

R. Rooyackers, E. Augendre, N. Collaert, 2007, 2007 IEEE Symposium on VLSI Technology.

Gate electrode effects on low-frequency (1/ f) noise in p-MOSFETs with high-? dielectrics

Eddy Simoen, Purushothaman Srinivasan, Durgamadhab Misra, 2006 .

A VFB tunable Single Metal Single Dielectric approach using As I/I into TiN/HfO2 for 32nm node and beyond

G. Boccardi, R. Singanamalla, J. Tseng, 2009, 2009 International Symposium on VLSI Technology, Systems, and Applications.

Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

S. De Gendt, S. Van Elshocht, A. Akheyar, 2007, 2007 IEEE International Electron Devices Meeting.

Low Vt Ni-FUSI CMOS Technology using a DyO cap layer with either single or dual Ni-phases

S. Van Elshocht, P. Lehnen, C. Vrancken, 2007, 2007 IEEE Symposium on VLSI Technology.

Electrical and material evaluation of the MOCVD TiN as metal gate electrode for advanced CMOS technology

Tom Schram, Stefan De Gendt, Malgorzata Jurczak, 2006 .

Tall triple-gate devices with TiN/HfO/sub 2/ gate stack

S. De Gendt, N. Collaert, W. Boullart, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..