Y. Kaneko

Process and device technologies for 16 Mbit EPROMs with large-tilt-angle implanted p-pocket cell

Kuniyoshi Yoshikawa, Y. Ohshima, N. Arai, 1990, International Technical Digest on Electron Devices.

An asymmetrical lightly-doped source (ALDS) cell for virtual ground high density EPROMs

Kuniyoshi Yoshikawa, Y. Ohshima, H. Araki, 1988, Technical Digest., International Electron Devices Meeting.

Novel process and device technologies for submicron 4Mb CMOS EPROMs

N. Matsukawa, S. Mori, K. Yoshikawa, 1987, 1987 International Electron Devices Meeting.

Threshold voltage instability and charge retention in nonvolatile memory cell with nitride/oxide double-layered inter-poly dielectric

Kuniyoshi Yoshikawa, Y. Ohshima, Seiichi Mori, 1991, 29th Annual Proceedings Reliability Physics 1991.

A 62ns 16Mb CMOS EPROM With Address Transition Detection Technique

Y. Iyama, S. Mori, Y. Ohshima, 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

Reliability study of thin inter-poly dielectrics for non-volatile memory application

H. Araki, Kuniyoshi Yoshikawa, Y. Ohshima, 1990, 28th Annual Proceedings on Reliability Physics Symposium.

Lucky-hole injection induced by band-to-band tunneling leakage in stacked gate transistors

Kuniyoshi Yoshikawa, Y. Ohshima, Seiichi Mori, 1990, International Technical Digest on Electron Devices.

ONO inter-poly dielectric scaling for nonvolatile memory applications

H. Araki, Kuniyoshi Yoshikawa, Y. Ohshima, 1991 .

Polyoxide thinning limitation and superior ONO interpoly dielectric for nonvolatile memory devices

Kuniyoshi Yoshikawa, Seiichi Mori, Y. Kaneko, 1991 .

Flash EEPROM Cell scaling based on tunnel oxide thinning limitations

Y. Ohshima, Seiichi Mori, E. Sakagami, 1991, 1991 Symposium on VLSI Technology.