Gyu-Seob Jeong

发表

A Modulo-FIR Equalizer for Wireline Communications

Deog-Kyoon Jeong, Gyu-Seob Jeong, Byungjun Kang, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 32 Gb/s, 201 mW, MZM/EAM Cascode Push–Pull CML Driver in 65 nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jiho Joo, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Reference Spur Reduction Techniques for a Phase-Locked Loop

Deog-Kyoon Jeong, Gyu-Seob Jeong, Han-Gon Ko, 2019, IEEE Access.

A 22 to 26.5 Gb/s Optical Receiver With All-Digital Clock and Data Recovery in a 65 nm CMOS Process

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jiho Joo, 2015, IEEE Journal of Solid-State Circuits.

25-Gb/s Clocked Pluggable Optics for High-Density Data Center Interconnections

Kwangho Lee, Deog-Kyoon Jeong, Gyu-Seob Jeong, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 28 Gb/s 1.6 pJ/b PAM-4 Transmitter Using Fractionally Spaced 3-Tap FFE and $G_{m}$ -Regulated Resistive-Feedback Driver

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 26.5 Gb/s optical receiver with all-digital clock and data recovery in 65nm CMOS process

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jiho Joo, 2014, 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC).

20-Gb/s 5-$\text{V}_{\mathrm{PP}}$ and 25-Gb/s 3.8-$\text{V}_{\mathrm{PP}}$ Area-Efficient Modulator Drivers in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jun-Eun Park, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

100 Gb/s photoreceiver module based on 4ch × 25 Gb/s vertical-illumination-type Ge-on-Si photodetectors and amplifier circuits

Hankyu Chi, Gyu-Seob Jeong, Jiho Joo, 2016, SPIE OPTO.

A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line

Deog-Kyoon Jeong, Gyu-Seob Jeong, Kwanseo Park, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

A 0.36 pJ/bit, 0.025 mm${}^{\text{2}}$, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology

Deog-Kyoon Jeong, Gyu-Seob Jeong, Kwanseo Park, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 10 Gb/s hybrid PLL-based forwarded clock receiver in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang–Bang Phase-Frequency Detection

Deog-Kyoon Jeong, Gyu-Seob Jeong, Sang-Hyeok Chu, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

A fully integrated 1-pJ/bit 10-Gb/s/ch forwarded-clock transmitter with a resistive feedback inverter based driver in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Woo-Rham Bae, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

4-Channel Push-Pull VCSEL Drivers for HDMI Active Optical Cable in 0.18-μm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Hong-Seok Choi, 2018, ISLPED.

An all-digital bang-bang PLL using two-point modulation and background gain calibration for spread spectrum clock generation

Deog-Kyoon Jeong, Gyu-Seob Jeong, Sang-Hyeok Chu, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jeongho Hwang, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

25 Gb/s photoreceiver based on vertical-illumination type Ge-on-Si photodetector and CMOS amplifier circuit for optical interconnects

Hankyu Chi, Gyu-Seob Jeong, Jiho Joo, 2015, Photonics West - Optoelectronic Materials and Devices.

A 0.015-mm$^{\text{2}}$ Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology

Taeik Kim, Deog-Kyoon Jeong, Gyu-Seob Jeong, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Programmable On-Chip Reference Oscillator With Slow-Wave Coplanar Waveguide in 14-nm FinFET CMOS

Taeik Kim, Gyu-Seob Jeong, Jeongho Hwang, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 20 Gb/s 0.4 pJ/b energy-efficient transmitter driver architecture utilizing constant Gm

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2015, 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Kwanseo Park, 2019, 2019 Symposium on VLSI Circuits.

Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

Deog-Kyoon Jeong, Gyu-Seob Jeong, Woo-Rham Bae, 2017, Sensors.

A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOS

Kyungock Kim, Deog-Kyoon Jeong, Gyu-Seob Jeong, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A 800-Mb/s 0.89-pJ/b reference-less optical receiver with pulse-position-modulation scheme

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A 1-pJ/bit, 10-Gb/s/ch Forwarded-Clock Transmitter Using a Resistive Feedback Inverter-Based Driver in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Woo-Rham Bae, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

Design of Silicon Photonic Interconnect ICs in 65-nm CMOS Technology

Hankyu Chi, Deog-Kyoon Jeong, Gyu-Seob Jeong, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 285-fs rms Integrated Jitter Injection-Locked Ring PLL with Charge-Stored Complementary Switch Injection Technique

Deog-Kyoon Jeong, Gyu-Seob Jeong, Woorham Bae, 2016 .

56Gb/s PAM-4 VCSEL Transmitter with Quarter-Rate Forwarded Clock using 65nm CMOS Circuits

Deog-Kyoon Jeong, Gyu-Seob Jeong, Sungwoo Kim, 2019, 2019 Optical Fiber Communications Conference and Exhibition (OFC).

A 64 GB/s 1.5 PJ/Bit PAM-4 Transmitter with 3-Tap FFE and GM-Regulated Active-Feedback Driver in 28 NM CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2018, 2018 IEEE Symposium on VLSI Circuits.

A 10 Gb/s PAM-4 Transmitter With Feed-Forward Implementation of Tomlinson-Harashima Precoding in 28 nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Kwanseo Park, 2021, IEEE Access.

Silicon photonic receiver and transmitter operating up to 36 Gb/s for λ~1550 nm.

Hankyu Chi, Deog-Kyoon Jeong, Gyu-Seob Jeong, 2015, Optics express.

A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant- ${\rm G}_{\rm m}$ Bias

Deog-Kyoon Jeong, Gyu-Seob Jeong, Haram Ju, 2016, IEEE Journal of Solid-State Circuits.