DuboisMichel

发表

Tolerating Late Memory Traps in Dynamically Scheduled Processors

QiuXiaogang, DuboisMichel, 2004 .

Shared cache architectures for decision support systems

DuboisMichel, JeongJaeheon, NandaAshwini, 2002 .

Synchronization, Coherence, and Event Ordering in Multiprocessors

DuboisMichel, ScheurichChristoph, A BriggsFayé, 1988 .

Dynamic MIPS rate stabilization in out-of-order processors

DuboisMichel, SuhJinho, 2009 .

Virtual-Address Caches Part 1

DuboisMichel, CekleovMichel, 1997 .

Effects of cache coherency in multiprocessors

DuboisMichel, A BriggsFayė, 1982 .

Sequential Hardware Prefetching in Shared-Memory Multiprocessors

StenströmPer, DuboisMichel, DahlgrenFredrik, 1995 .

Dynamic MIPS Rate Stabilization for Complex Processors

DuboisMichel, SuhJinho, HuangChieh-Ting, 2015 .

Verification techniques for cache coherence protocols

DuboisMichel, PongFong, 1997 .

Parallel asynchronous algorithms for discrete data

DuboisMichel, ÜresinAydin, 1990 .

Formal verification of complex coherence protocols using symbolic state models

DuboisMichel, PongFong, 1998 .

A comparative evaluation of hybrid distributed shared-memory systems

DuboisMichel, MogaAdrian, 2009 .

Design Verification of the S3.mp Cache-Coherent Shared-Memory System

DuboisMichel, PongFong, NowatzykAndreas, 1998 .

Rapid Hardware Prototyping on RPM-2

DuboisMichel, JeongJaeheon, SongYong Ho, 1998 .

Cache Replacement Algorithms with Nonuniform Miss Costs

DuboisMichel, JeongJaeheon, 2006 .