Jennifer Pham

An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology

Ayal Shoval, Afshin Rezayee, Mohamed Abdalla, 2011, 2011 IEEE International Solid-State Circuits Conference.

A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support

William Song, Dominic DiClemente, Marcus van Ierssel, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

A Time-Interleaved $\Delta\Sigma$-DAC Architecture Clocked at the Nyquist Rate

Anthony Chan Carusone, Jennifer Pham, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Time-Interleaved -DAC Architecture Clocked at the Nyquist Rate

Anthony Chan Carusone, Jennifer Pham, 2008 .

A compact antenna-in-package 60-GHz SiGe BiCMOS radio

Jennifer Pham, Mohammad Fakharzadeh, Eric Juntunen, 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.

11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS

Nanyan Y. Wang, Dominic DiClemente, Nhat Nguyen, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).