Jakub Szyduczynski

Voltage-to-digital converter with event-driven charge redistribution

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2014, 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI).

Optimized design of successive approximation time-to-digital converter with single set of delay lines

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2016, 2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP).

Sample-and-Hold Asynchronous Sigma-Delta Time Encoding Machine

Dariusz Koscielnik, Jakub Szyduczynski, Dominik Rzepka, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

Upper Bounds on Unsuccessful Transmission Rate in Persistent and Non-Persistent CSMA Protocols

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2013, 2013 22nd International Conference on Computer Communication and Networks (ICCCN).

A Successive Approximation Time-to-Digital Converter with Single Set of Delay Lines for Time Interval Measurements

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2019, Sensors.

Event-driven charge redistribution analog-to-digital converter with simultaneous sampling and conversion

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2014, 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI).

Optimizing time-to-digital converter architecture for successive approximation time measurements

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2013, 2013 IEEE Nordic-Mediterranean Workshop on Time-to-Digital Converters (NoMe TDC).

Analytical approach to multiple memoryless backoff contention analysis

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2015, 2015 IEEE World Conference on Factory Communication Systems (WFCS).

Systematization and Comparison of the Binary Successive Approximation Variants

Marek Miskowicz, Dariusz Koscielnik, Jakub Szyduczynski, 2021, Sensors.