Michael A. Sorna

Horizons of SiGe BiCMOS

Alvin J. Joseph, Douglas Duane Coolbaugh, D. Harame, 2002 .

High Speed Serdes Devices and Applications

Michael A. Sorna, David R. Stauffer, Jeanne Trinko Mechler, 2008 .

A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization

Michael A. Sorna, Herschel A. Ainspan, Michael P. Beakes, 2005, IEEE Journal of Solid-State Circuits.

Feedforward and Decision-Feedback Equalization

Michael A. Sorna, Brian L. Ji, Benjamin D. Parker, 2005 .

Method to determine optimum equalization for maximum eye in high-speed computer system

Michael A. Sorna, Gary Peterson, Sungjun Chun, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology

Mounir Meghelli, Michael A. Sorna, Sergey V. Rylov, 2012, IEEE J. Solid State Circuits.

Abtastsignalverschiebung in configurations with bidirectional Speicherabtastsignalen

Michael A. Sorna, David William Mann, Daniel M. Dreps, 2011 .

40 Gbit/sec circuits built from a 120 GHz f/sub T/ SiGe technology

Alvin J. Joseph, Gregory G. Freeman, Mounir Meghelli, 2001 .

40-Gb/s Circuits Built From a 120-GHz

Alvin J. Joseph, Mounir Meghelli, Alexander V. Rylyakov, 2002 .

0.13μm 210GHz f T SiGe HBTs - expanding the horizons of SiGe BiCMOS

Alvin J. Joseph, C. Dickey, David R. Greenberg, 2002 .