Shoji Otaka

发表

A 1.5GHz-modulation-range 10ms-modulation-period 180kHzrms-frequency-error 26MHz-reference mixed-mode FMCW synthesizer for mm-wave radar application

Hiroki Sakurai, Yuka Kobayashi, Toshiya Mitomo, 2011, 2011 IEEE International Solid-State Circuits Conference.

A 1024-QAM capable WLAN receiver with −56.3 dB image rejection ratio using self-calibration technique

Shoji Otaka, Ichiro Seto, Shigehito Saigusa, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A 1.8GHz linear CMOS power amplifier with supply-path switching scheme for WCDMA/LTE applications

Shoji Otaka, Shigehito Saigusa, Kohei Onizuka, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Sub-GHz Phase-Based Ranging System: Implementation and Evaluation

Shoji Otaka, Masaki Nishikawa, Katsuya Nonin, 2020, 2020 IEEE 91st Vehicular Technology Conference (VTC2020-Spring).

A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique

Shoji Otaka, Shigehito Saigusa, Kohei Onizuka, 2012, 2012 Symposium on VLSI Circuits (VLSIC).

A 10-dBm IIP SiGe Mixer With IM Cancellation Technique

Shoji Otaka, Masato Ishii, Tetsuro Itakura, 2004 .

A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems

Shoji Otaka, Osamu Watanabe, Tetsuro Itakura, 2003 .

A voltage ratio-based efficiency control method for 3 kW wireless power transmission

Shoji Otaka, Tetsuro Itakura, Shuichi Obayashi, 2014, 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014.

Trend of wireless communication systems and wide‐band circuits

Shoji Otaka, Osamu Watanabe, Takafumi Yamaji, 2005 .

A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler

Ryuichi Fujimoto, Shoji Otaka, Hiroshi Tanimoto, 1999 .

A Low LO Leakage and Low Power LO Buffer for Direct-Conversion Quadrature Demodulator

Ryuichi Fujimoto, Shunji Kawaguchi, Toshiya Mitomo, 2005, IEICE Trans. Electron..

A design and evaluation of RF stage for wideband receiver

Shoji Otaka, Takafumi Yamaji, Hiroshi Tsurumi, 2000 .

High-speed CMOS U0 Buffer Circuits

Shoji Otaka, Shoichi Shimizu, Shigeru Tanaka, 1992 .

Low Local Input 1.9 GHz S olar adrature Modulator with No Adjustment

Ryuichi Fujimoto, Shoji Otaka, Takafumi Yamaji, 1996 .

A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization

Osamu Watanabe, Shoji Otaka, Masahiro Hosoya, 2010, IEEE Journal of Solid-State Circuits.

A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization

Osamu Watanabe, Shoji Otaka, Masahiro Hosoya, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

IM3 Cancellation Technique

Shoji Otaka, Masato Ishii, Tetsuro Itakura, 2004 .

1Gbps Pure CMOS I/O Buffer Circuits

Shoji Otaka, Sumio Tanaka, Yoshiaki Toyoshima, 1991, 1991 Symposium on VLSI Circuits.

A 2.4 GHz CMOS Doherty power amplifier with dynamic biasing scheme

Shoji Otaka, Shigehito Saigusa, Kohei Onizuka, 2012, 2012 IEEE Asian Solid State Circuits Conference (A-SSCC).

Session 24 overview / RF: Transmitter blocks

Shoji Otaka, Francesco Svelto, 2011, ISSCC 2011.

A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller

Osamu Watanabe, Shoji Otaka, Shigehito Saigusa, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

Broadband and Flexible Receiver Architecture for Software Defined Radio Terminal Using Direct Conversion and Low-IF Principle

Shoji Otaka, Hiroshi Yoshida, Yasuo Suzuki, 2000 .

A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion

Osamu Watanabe, Shoji Otaka, Shigehito Saigusa, 2012, IEEE Journal of Solid-State Circuits.

High-speed CMOS I/O buffer circuits

Shoji Otaka, Sumio Tanaka, Yoshiaki Toyoshima, 1992 .

ECO chip: Energy Consumption Zeroize Chip with a 953MHz High-Sensitivity Radio Wave Detector for Standby Mode Applications

Shoji Otaka, Toshiyuki Umeda, 2007, 2007 IEEE Custom Integrated Circuits Conference.

A 1024-QAM Capable WLAN Receiver with -56.3dB Image Rejection Ratio Using Self-Calibration Technique

Shoji Otaka, Ichiro Seto, Shigehito Saigusa, 2018, IEICE Trans. Electron..

A Low Offset 1.9-GHz Direct Conversion Receiver IC with Spurious Free Dynamic Range of over 67 dB

Shoji Otaka, Takafumi Yamaji, Hiroshi Tanimoto, 2001 .

A Low-Noise Amplifier using Variable Degeneration Inductance

Shoji Otaka, Ryuichi Fujimoto, Hiroshi Yoshida, 2004 .

RF noise in 1.5 nm gate oxide MOSFETs and the evaluation of the NMOS LNA circuit integrated on a chip

Shoji Otaka, Hiroshi Iwai, H. Kimijima, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

A low local input 1.9 GHz Si-bipolar quadrature modulator with no adjustment

Shoji Otaka, Takafumi Yamaji, Hiroshi Tanimoto, 1996 .

A 1.9-GHz Si-bipolar variable attenuator for PHS transmitter

Shoji Otaka, Hiroshi Tanimoto, S. Watanabe, 1996 .