Lukás Nagy

发表

Readout interface for capacitive MEMS microphone in CMOS technology

Gabriel Nagy, Daniel Arbet, Viera Stopjaková, 2015, 2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES).

Current Sensing Completion Detection in Single-Rail Asynchronous Systems

Viera Stopjaková, Lukás Nagy, Juraj Brenkus, 2014, Comput. Informatics.

Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits

Vladimír Sedlák, Daniel Arbet, Viera Stopjaková, 2017, J. Circuits Syst. Comput..

Completion detection in dual-rail asynchronous systems by current-sensing

Viera Stopjaková, Lukás Nagy, Roman Záluský, 2013, Microelectron. J..

3-D electrothermal device/circuit simulation of DC-DC converter module in multi-die IC

Juraj Marek, Ales Chvála, Patrik Pribytny, 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2017, J. Circuits Syst. Comput..

Novel architecture of a digital neuron for FFNN employing special multiplication

Viera Stopjaková, Lukás Nagy, Roman Záluský, 2014, ECAI.

Current Sensing Completion Detection in deep sub-micron technologies

Viera Stopjaková, Lukás Nagy, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology

Daniel Arbet, Viera Stopjaková, Lukás Nagy, 2017, 2017 IEEE AFRICON.

Impedance calculation based method for AC fault analysis of mixed-signal circuits

Daniel Arbet, Viera Stopjaková, Lukás Nagy, 2016, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2016, 2016 39th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO).

Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates

Alexander Satka, Juraj Marek, Ales Chvála, 2019, 2019 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

A Novel Hardware-Accelerated Priority Queue for Real-Time Systems

Viera Stopjaková, Lukás Nagy, Lukás Kohutka, 2018, 2018 21st Euromicro Conference on Digital System Design (DSD).

Current sensing completion detection in dual-rail asynchronous systems

Viera Stopjaková, Lukás Nagy, 2012, 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2018, 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems

Viera Stopjaková, Lukás Nagy, Lukas Kohutka, 2019, 2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2018, 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell

Alexander Satka, Juraj Marek, Ales Chvála, 2018, 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

Design of In AlN/GaN Heterostructure-Based Logic Cells

Alexander Satka, Viera Stopjaková, Lukás Nagy, 2015, 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2016, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Fully On-Chip Low-Drop Regulator for Low-Power Applications

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2021, 2021 44th International Convention on Information, Communication and Electronic Technology (MIPRO).

Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications

Daniel Arbet, Viera Stopjaková, Michal Sovcik, 2021, Sensors.

EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design

Daniel Arbet, Viera Stopjaková, Michal Sovcik, 2021, 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method

Daniel Arbet, Viera Stopjaková, Martin Kovác, 2021, 2021 IEEE AFRICON.