A. Suzuki

3.3 volt sense-amplifier schemes suitable for 4 Mb BiCMOS SRAMs

A. Suzuki, H. Kato, T. Kobayashi, 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.

with Alternating Bit-line Loads

Atsushi Kawasumi, A. Suzuki, Kazunari Ishimaru, 1996 .

A 25-ns 1-Mbit CMOS SRAM with loading-free bit lines

Tetsuya Iizuka, Hiroshi Iwai, A. Suzuki, 1987 .

11.5ns 1M x 1/256K x 4TTL BiCMOS SRAM's with voltage- and temperature-compensated interfaces

A. Suzuki, T. Hamano, K. Sato, 1989, Symposium 1989 on VLSI Circuits.