M. Matsui

3.3 volt sense-amplifier schemes suitable for 4 Mb BiCMOS SRAMs

A. Suzuki, H. Kato, T. Kobayashi, 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.

A 200 MHz 13 mm/sup 2/ 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme

Lee-Sup Kim, Takayasu Sakurai, M. Matsui, 1994 .

An 8-ns 1-Mbit ECL BiCMOS SRAM with double-latch ECL-to-CMOS-level converters

M. Matsui, Jun-ichi Matsunaga, A. Suzuki, 1989 .

SRAM cell stability under the influence of parasitic resistances and data holding voltage as a stability prober

H. Kato, M. Matsui, K. Ochii, 1997 .

An 8 ns 1 Mb ECL BiCMOS SRAM

Katsuhiko Sato, J. Matsunaga, M. Matsui, 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

A reverse base current under high level injection and its influence on BiCMOS circuit

M. Matsui, T. Maeda, Hisayo Sasaki Momose, 1991, International Electron Devices Meeting 1991 [Technical Digest].