Harry H. Chen

35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC

Shih-Arn Hwang, Eric Jia-Wei Fang, Bo-Jr Huang, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Beyond structural test, the rising need for system-level test

Harry H. Chen, Harry H. Chen, 2018, 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

Predicting system-level test and in-field customer failures using data mining

Harry H. Chen, Roger Hsu, PaulYoung Yang, 2013, 2013 IEEE International Test Conference (ITC).

2.2 A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET

Eric Jia-Wei Fang, Harry H. Chen, Bo-Jr Huang, 2023, 2023 IEEE International Solid- State Circuits Conference (ISSCC).

Covering hard-to-detect defects by thermal quorum sensing

Cheng-Wen Wu, Harry H. Chen, Po-Yao Chuang, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

FPGA-Based Emulation for Accelerating Transient Fault Reduction Analysis

Harry H. Chen, J. Liou, Zih-Ming Huang, 2022, 2022 IEEE 31st Asian Test Symposium (ATS).

Transient Fault Pruning for Effective Candidate Reduction in Functional Debugging

Harry H. Chen, J. Liou, Dun-An Yang, 2022, 2022 IEEE International Test Conference (ITC).

Statistical techniques for predicting system-level failure using stress-test data

Mango Chia-Tso Chao, Jonathan Tung, Harry H. Chen, 2015, 2015 IEEE 33rd VLSI Test Symposium (VTS).