S. U. Engelmann

Effect of surface temperature on GeSbTe damage formation during plasma processing

R. L. Bruce, M. Hopstaken, H. Miyazoe, 2021, Advanced Lithography.

SiGe HBTs in 90nm BiCMOS technology demonstrating 300GHz/420GHz fT/fMAX through reduced Rb and Ccb parasitics

V. Jain, B. Zetterlund, D. L. Harame, 2013, 2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM).

SiGe-on-insulator symmetric lateral bipolar transistors

R. T. Mo, T. H. Ning, S. U. Engelmann, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

High performance and record subthreshold swing demonstration in scaled RMG SiGe FinFETs with high-Ge-content channels formed by 3D condensation and a novel gate stack process

T. Ando, V. Narayanan, E. Leobandung, 2017, 2017 Symposium on VLSI Technology.

Gate-all-around silicon nanowire MOSFETs and circuits

A. Majumdar, M. M. Frank, Y. Zhang, 2010, 68th Device Research Conference.

High-performance Si1−xGex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensions

R. H. Dennard, E. Leobandung, P. Hashemi, 2013, 2013 Symposium on VLSI Technology.

Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT ∼7Å and scaled dimensions down to sub-4nm fin widths

T. Ando, V. Narayanan, E. Leobandung, 2016, 2016 IEEE Symposium on VLSI Technology.

Density scaling with gate-all-around silicon nanowire MOSFETs for the 10 nm node and beyond

I. Lauer, R. L. Bruce, K. Balakrishnan, 2013, 2013 IEEE International Electron Devices Meeting.