Erik Brunvand

发表

Power and energy implications of misunderstanding DRAM

Daniel Kopta, Erik Brunvand, E. Brunvand, 2017, 2017 Eighth International Green and Sustainable Computing Conference (IGSC).

Testing micropipelines

Erik Brunvand, Ajay Khoche, 1994, Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems.

HDL Modeling for Optimization and Verification of Asynchronous Controllers

Erik Brunvand, Jung-Lin Yang, Sung-Min Lin, 2005 .

Mach-RT: a many chip architecture for ray tracing

Erik Brunvand, Cem Yuksel, Elena Vasiou, 2019, High Performance Graphics.

Computational Thinking Meets Design Thinking: Technology and Arts Collaborations

Erik Brunvand, 2015, ACM Great Lakes Symposium on VLSI.

Arts/tech collaboration with embedded systems and kinetic art

Erik Brunvand, 2013, SIGGRAPH '13.

Low latency self-timed flow-through FIFOs

Erik Brunvand, 1995, Proceedings Sixteenth Conference on Advanced Research in VLSI.

To regulate based data retrieval process and arrangement.

Erik Brunvand, Alan Davis, Ian N. Robinson, 1986 .

DFT for fast testing of self-timed control circuits

Erik Brunvand, Ajay Khoche, Sandeep Pagey, 1995, Proceedings of the Fourth Asian Test Symposium.

Why graphics programmers need to know about DRAM

Daniel Kopta, Erik Brunvand, Niladrish Chatterjee, 2014, SIGGRAPH '14.

Image ditching: manipulating images with audio effects

Erik Brunvand, 2019, SIGGRAPH 2019.

Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier

Erik Brunvand, V. Chandramouli, Kent F. Smith, 1996, IEEE Trans. Very Large Scale Integr. Syst..

A correctness criterion for asynchronous circuit validation and optimization

Ganesh Gopalakrishnan, Erik Brunvand, Steven M. Nowick, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

An Integrated Environment for the Design and Simulation of Self-Timed Systems

Erik Brunvand, M. Starkey, 1991, VLSI.

TRaX: A Multicore Hardware Architecture for Real-Time Ray Tracing

Daniel Kopta, Erik Brunvand, Josef B. Spjut, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Impulse: building a smarter memory controller

Erik Brunvand, Wilson C. Hsieh, Leigh Stoller, 1999, Proceedings Fifth International Symposium on High-Performance Computer Architecture.

Extending Student Labs with SMT Circuit Implementation

Erik Brunvand, 2019, ACM Great Lakes Symposium on VLSI.

Mach-RT: A Many Chip Architecture for High Performance Ray Tracing

Erik Brunvand, Cem Yuksel, Elena Vasiou, 2020, IEEE Transactions on Visualization and Computer Graphics.

Improved Technique on Parallelism for Asynchronous Controllers

Erik Brunvand, Jung-Lin Yang, 2006 .

The Heroic Hacker: Legends of the Computer Age

Erik Brunvand, E. Brunvand, 2013 .

Fast, effective BVH updates for animated scenes

Daniel Kopta, Erik Brunvand, Andrew Kensler, 2012, I3D '12.

GreenChip: A tool for evaluating holistic sustainability of modern computing systems

Alex K. Jones, Rami Melhem, Erik Brunvand, 2017, Sustain. Comput. Informatics Syst..

Asynchronous VLSI design for neural system implementation

Erik Brunvand, John F. Hurdle, Lüli Josephson, 1995 .

Reliable interfacing of self-timed FPGA-based neural classifiers to synchronous parts

Erik Brunvand, John F. Hurdle, Lüli Josephson, 1994 .

Dark Silicon Considered Harmful: A Case for Truly Green Computing

Alex K. Jones, Erik Brunvand, Donald Kline, 2018, 2018 Ninth International Green and Sustainable Computing Conference (IGSC).

Rethinking graphics and gaming courses because of fast ray tracing

Erik Brunvand, Peter Shirley, Steven G. Parker, 2007, SIGGRAPH '07.

Using FPGAs to implement self-timed systems

Erik Brunvand, 1993, J. VLSI Signal Process..

Arduino drawing machine workshop and contest

Erik Brunvand, Ginger Alford, Paul Stout, 2014, SIGGRAPH Studio.

A Mobile Accelerator Architecture for Ray Tracing

Daniel Kopta, Erik Brunvand, Josef Spjut, 2012 .

SimTRaX: Simulation Infrastructure for Exploring Thousands of Cores

Daniel Kopta, Erik Brunvand, Cem Yuksel, 2018, ACM Great Lakes Symposium on VLSI.

An energy and bandwidth efficient ray tracing architecture

Daniel Kopta, Erik Brunvand, Josef B. Spjut, 2013, HPG '13.

Fast ray tracing and the potential effects on graphics and gaming courses

Erik Brunvand, Peter Shirley, Steven G. Parker, 2008, Comput. Graph..

DESIGN METHODOLOGY FOR ANALOG VLSI IMPLEMENTATIONS OF ERROR CONTROL DECODERS

Chris J. Myers, Erik Brunvand, Christian Schlegel, 2003 .

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI: Foreword

David Atienza, Erik Brunvand, Iris Bahar, 2010 .

Memory System Support for Irregular Applications

Erik Brunvand, Wilson C. Hsieh, Leigh Stoller, 1998, LCR.

Efficient MIMD architectures for high-performance ray tracing

Daniel Kopta, Erik Brunvand, Josef B. Spjut, 2010, 2010 IEEE International Conference on Computer Design.

Testing self-timed circuits using scan paths

Erik Brunvand, Ajay Khoche, 1993 .

Using dynamic domino circuits in self-timed systems

Erik Brunvand, Jung-Lin Yang, 2003, GLSVLSI '03.

Self-timed design with dynamic domino circuits

Erik Brunvand, Jung-Lin Yang, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

A comparison of self-timed design using FPGA, CMOS, and GaAs technologies

Erik Brunvand, Kent F. Smith, Nick Michell, 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

The NSR processor

Erik Brunvand, 1993, [1993] Proceedings of the Twenty-sixth Hawaii International Conference on System Sciences.

Using surface-mount components in an embedded systems lab

Erik Brunvand, 2015, WCAE.

A partial scan methodology for testing self-timed circuits

Erik Brunvand, Ajay Khoche, 1995, Proceedings 13th IEEE VLSI Test Symposium.

Using FPLs to Prototoype a Self-Timed Computer

Erik Brunvand, 1992, FPL.

Critical hazard free test generation for asynchronous circuits

Erik Brunvand, Ajay Khoche, 1997, Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125).

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010

Fabrizio Lombardi, David Atienza, Erik Brunvand, 2010, ACM Great Lakes Symposium on VLSI.

Automatic rapid prototyping of semi-custom VLSI circuits using Actel FPGAs

Erik Brunvand, Jae-Tack Yoo, Kent F. Smith, 1995, Proceedings. Fifth Great Lakes Symposium on VLSI.

Memory Considerations for Low Energy Ray Tracing

Daniel Kopta, Erik Brunvand, Josef B. Spjut, 2015, Comput. Graph. Forum.

Dual streaming for hardware-accelerated ray tracing

Daniel Kopta, Erik Brunvand, Cem Yuksel, 2017, High Performance Graphics.

Hardware-Accelerated Dual-Split Trees

Daniel Kopta, Erik Brunvand, Cem Yuksel, 2020, Proc. ACM Comput. Graph. Interact. Tech..

Designing self-timed systems using concurrent programs

Erik Brunvand, E. Brunvand, 1994, J. VLSI Signal Process..

TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing

Daniel Kopta, Erik Brunvand, Josef B. Spjut, 2008, 2008 Symposium on Application Specific Processors.

Time Interval Ray Tracing for Motion Blur

Daniel Kopta, Erik Brunvand, Cem Yuksel, 2018, IEEE Transactions on Visualization and Computer Graphics.

Holistically evaluating the environmental impacts in modern computing systems

Rami G. Melhem, Alex K. Jones, Erik Brunvand, 2016, 2016 Seventh International Green and Sustainable Computing Conference (IGSC).

Fred: an architecture for a self-timed decoupled computer

Erik Brunvand, William F. Richardson, 1996, Proceedings Second International Symposium on Advanced Research in Asynchronous Circuits and Systems.

Design of a cell library for asynchronous microengines

Erik Brunvand, Gaurav Gulati, 2005, GLSVLSI '05.

Using FPGAs to prototype a self-timed floating point co-processor

Erik Brunvand, Joe H. Novak, 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

Lights! speed! action!: fundamentals of physical computing for programmers

Erik Brunvand, 2013, SIGGRAPH '13.

Leveraging CS Teachable Moments in the Maker Movement (Abstract Only)

Erik Brunvand, Jennifer (Ginger) Alford, 2016, SIGCSE 2016.

Proceedings of the 20th symposium on Great lakes symposium on VLSI

Fabrizio Lombardi, David Atienza, Erik Brunvand, 2010, GLSVLSI 2010.

Practical advances in asynchronous design

Kenneth Y. Yun, Erik Brunvand, Steven M. Nowick, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

Practical advances in asynchronous design and in asynchronous/synchronous interfaces

Kenneth Y. Yun, Erik Brunvand, Steven M. Nowick, 1999, DAC '99.

A noise-based curriculum for technological fluency

Erik Brunvand, 2015, SIGGRAPH Studio.

Testing self-timed circuits using partial scan

Erik Brunvand, Ajay Khoche, 1995, Proceedings Second Working Conference on Asynchronous Design Methodologies.

The NSR Processor Prototype

Erik Brunvand, William F. Richardson, 1992 .

Translating concurrent programs into delay-insensitive circuits

Erik Brunvand, Robert F. Sproull, R. Sproull, 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

A cell set for self-timed design using actel FPGAs

Erik Brunvand, 1991 .

Speculatorum oculi

Erik Brunvand, 2014, SIGGRAPH '14.

Guest editors' introduction to the special issue on asynchronous systems

Ganesh Gopalakrishnan, Erik Brunvand, G. Gopalakrishnan, 1993, Integr..

Hardware-accelerated gradient noise for graphics

Erik Brunvand, Josef B. Spjut, Andrew E. Kensler, 2009, GLSVLSI '09.

Hardware prediction of OS run-length for fine-grained resource customization

Erik Brunvand, David W. Nellans, Rajeev Balasubramonian, 2010, 2010 IEEE International Symposium on Performance Analysis of Systems & Software (ISPASS).

Parts-R-Us.

Erik Brunvand, 1987 .

Drawing machines: exploring embedded system programming and hardware with an artistic flair (abstract only)

Erik Brunvand, Paul Stout, Jennifer Reynolds Alford, 2013, SIGCSE '13.

A case for increased operating system support in chip multi-processors

Erik Brunvand, 2005 .

Technological fluency through circuit bending

Erik Brunvand, 2015, 2015 IEEE International Conference on Microelectronics Systems Education (MSE).

Impulse : An Adaptable Memory System

Erik Brunvand, Wilson C. Hsieh, Leigh Stoller, 2007 .

Reliable interface design for combining asynchronous and synchronous circuits

Erik Brunvand, John F. Hurdle, Lueli Josephson, 1993 .

Peephole optimization of asynchronous macromodule networks

Ganesh Gopalakrishnan, Erik Brunvand, Prabhakar Kudva, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Performance analysis and optimization of asynchronous circuits

Ganesh Gopalakrishnan, Erik Brunvand, Venkatesh Akella, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Kinetic art and embedded systems: a natural collaboration

Erik Brunvand, Paul Stout, E. Brunvand, 2011, SIGCSE.

ACT: a DFT tool for self-timed circuits

Erik Brunvand, Ajay Khoche, 1997, Proceedings International Test Conference 1997.

Windchime: an FPGA-based self-timed parallel processor

Erik Brunvand, 1994 .

Peephole optimization of asynchronous macromodule networks

Ganesh Gopalakrishnan, Erik Brunvand, Prabhakar Kudva, 1999, IEEE Trans. Very Large Scale Integr. Syst..

ARCS: an architectural level communication driven simulator

Erik Brunvand, David W. Nellans, Vamshi Krishna Kadaru, 2004, GLSVLSI '04.

Games as motivation in computer design courses: I/O is the key

Erik Brunvand, 2011, SIGCSE '11.

A detailed study of ray tracing performance: render time and energy cost

Erik Brunvand, Cem Yuksel, Ian Mallett, 2018, The Visual Computer.

Sustainable IC design and fabrication

Alex K. Jones, Erik Brunvand, Donald Kline, 2017, 2017 Eighth International Green and Sustainable Computing Conference (IGSC).

Precise exception handling for a self-timed processor

Erik Brunvand, William F. Richardson, 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.

Translating concurrent communicating programs into asynchronous circuits

Erik Brunvand, 1992 .

Making Noise

Erik Brunvand, Nina McCurdy, 2017, SIGCSE.

Robust neural classifier circuits using asynchronous design

Erik Brunvand, John F. Hurdle, Peter R. Conwell, 1993 .

Improving server performance on multi-cores via selective off-loading of OS functionality

Erik Brunvand, David W. Nellans, Rajeev Balasubramonian, 2010, ISCA'10.

Arduino drawing machine workshop and contest

Erik Brunvand, Ginger Alford, Paul Stout, 2014, SIGGRAPH Studio.

Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

Erik Brunvand, E. Brunvand, 2009 .

OS execution on multi-cores: is out-sourcing worthwhile?

Erik Brunvand, David W. Nellans, Rajeev Balasubramonian, 2009, OPSR.

Navigating the Seismic Shift of Post-Moore Computer Systems Design

Rance Cleaveland, Margaret Martonosi, Pinaki Mazumder, 2021, IEEE Micro.

ASIM-An Asynchronous Architectural Level Simulator

Erik Brunvand, Vamshi Krishna Kadaru, Dave Nellans, 2004 .

High-level asynchronous system design using the ACK framework

Ganesh Gopalakrishnan, Erik Brunvand, Prabhakar Kudva, 2000, Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586).