Chunyu Peng

发表

A radiation harden enhanced Quatro (RHEQ) SRAM cell

Ziyang Chen, Xiulong Wu, Chunyu Peng, 2017, IEICE Electron. Express.

Erratum: A novel cascade control replica-bitline delay technique for reducing timing process-variation of SRAM sense amplifier [IEICE Electronics Express Vol 12 (2015) No 5 pp 20150102]

Wenjuan Lu, Junning Chen, Chunyu Peng, 2015, IEICE Electron. Express.

Current mirror-based compensation circuit for multi-row read in-memory computing

Xiulong Wu, Chunyu Peng, Zhiting Lin, 2019 .

Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application

Qiang Zhao, Xuan Zeng, Changyong Liu, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A dual-output hardening design of inverter chain for P-hit single-event transient pulse elimination

Qiang Zhao, Xuan Zeng, Xuan Li, 2018, IEICE Electron. Express.

Multiple Sharing 7T1R Nonvolatile SRAM With an Improved Read/Write Margin and Reliable Restore Yield

Yong Wang, Xuan Li, Xiulong Wu, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A high performance radiation-hardened SRAM cell based on Quatro

Chunyu Peng, Zhengping Li, Yuyong Jia, 2019, IEICE Electron. Express.

A single event upset tolerant latch with parallel nodes

Xuan Zeng, Qiang Zhao, Xiangdong Hu, 2019, IEICE Electron. Express.

Average 7T1R Nonvolatile SRAM With R/W Margin Enhanced for Low-Power Application

Wenjuan Lu, Xiulong Wu, Chunyu Peng, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Self-compared bit-line pairs for eliminating effects of leakage current

Xiulong Wu, Chunyu Peng, Jingbo Zhang, 2017 .

Challenges and Solutions of the TFET Circuit Design

Xu Yan, Shuguang Zhang, Zhou Yang, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

Human dynamics in mobile social networks: A study of inter-node relationships

Xiulong Wu, Chunyu Peng, Zhiting Lin, 2015, 2015 12th International Conference on Fuzzy Systems and Knowledge Discovery (FSKD).

Variation-resilient pipelined timing tracking circuit for SRAM sense amplifier

Wenjuan Lu, Xincun Ji, Zhengping Li, 2016, IEICE Electron. Express.

Improvement for low power high performance hybrid type CAM

Chunyu Peng, Zhi-ting Lin, Jun-ning Chen, 2014 .

Multi-stage dual replica bit-line delay technique for process-variation-robust timing of low voltage SRAM sense amplifier

Shoubiao Tan, Wenjuan Lu, Zhengping Li, 2015, Frontiers of Information Technology & Electronic Engineering.

In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands

Wenjuan Lu, Junning Chen, Xiulong Wu, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

The Optimization Scheme Of The Leakage Current Reduction Technique For SRAM Design

Fengyi Shang, Chunyu Peng, 2015 .

A Novel Controllable BIST Circuit for embedded SRAM

Kun Wang, Chunyu Peng, Zhiting Lin, 2016 .

Reverse Bias Current Eliminated, Read-Separated, and Write-Enhanced Tunnel FET SRAM

Xuan Li, Xiulong Wu, Chunyu Peng, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Physical mechanism study of N-well doping effects on the single-event transient characteristic of PMOS

Changyong Liu, Xiulong Wu, Chunyu Peng, 2019, IEICE Electron. Express.

Image-to-class distance ratio: A feature filtering metric for image classification

Ling Shao, Shoubiao Tan, Chunyu Peng, 2015, Neurocomputing.

Novel Write-Enhanced and Highly Reliable RHPD-12T SRAM Cells for Space Applications

Qiang Zhao, Xiulong Wu, Chunyu Peng, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A new reading mode based on balanced pre-charging and group decoding

Xiulong Wu, Chunyu Peng, Wenjuan Lu, 2020, IEICE Electron. Express.

Additive-calibration scheme for leakage compensation of low voltage SRAM

Wei Hong, Xiulong Wu, Chunyu Peng, 2016, IEICE Electron. Express.

Offset voltage suppressed sense amplifier with self-adaptive distribution transformation technique

Xuan Zeng, Hua Xu, Lingyu Kong, 2018, IEICE Electron. Express.

Read/write margin enhanced 10T SRAM for low voltage application

Wenjuan Lu, Xincun Ji, Lijun Guan, 2016, IEICE Electron. Express.

A novel cascade control replica-bitline delay technique for reducing timing process-variation of SRAM sense amplifier

Wenjuan Lu, Xinchun Ji, Zhengping Li, 2015, IEICE Electron. Express.

(paper withdrawn) Variation-tolerant Timing Tracking Scheme for SRAM sense amplifier Based on Multi-Stage Dual RBL Delay Technique

Fengyi Shang, Chunyu Peng, 2015 .

An inverter chain with parallel output nodes for eliminating single-event transient pulse

Qiang Zhao, Xuan Zeng, Changyong Liu, 2019, IEICE Electron. Express.

Efficient replica bitline technique for variation-tolerant timing generation scheme of SRAM sense amplifiers

Chunyu Peng, Lu Wenjuan, Li Zhengping, 2015 .

A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process

Lijun Guan, Xiulong Wu, Chunyu Peng, 2017, IEEE Journal of Solid-State Circuits.

In-Memory Multibit Multiplication Based on Bitline Shifting

Junning Chen, Xiulong Wu, Chunyu Peng, 2022, IEEE Transactions on Circuits and Systems II: Express Briefs.

Half-Select Disturb-Free 10T Tunnel FET SRAM Cell With Improved Noise Margin and Low Power Consumption

Xiulong Wu, Chunyu Peng, Zhiting Lin, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports

Junning Chen, Xiulong Wu, Chunyu Peng, 2021, IEEE Journal of Solid-State Circuits.

Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing

Junning Chen, Xiulong Wu, Chunyu Peng, 2021, IEEE Journal of Solid-State Circuits.

An 8T SRAM Array with Configurable Word Lines for In-Memory Computing Operation

Junning Chen, Xiulong Wu, Chunyu Peng, 2021, Electronics.