Gi-Sung Yeo

发表

The emergence of assist feature OPC era in sub-130nm DRAM devices

Byeong-soo Kim, Insung Kim, Gi-Sung Yeo, 2001 .

Analsysis of Process Parameters to Improve In-Chip Linewidth Variation

Gi-Sung Yeo, Han-Ku Cho, Jong-Rak Park, 2004 .

Assessments on process parameters' influences to the proximity correction

Gi-Sung Yeo, Jung-Hyeon Lee, Han-Ku Cho, 2004, SPIE Advanced Lithography.

The lithography process design for 4Giga-bit DRAM of 0.31k1 with KrF

Byeong-soo Kim, Insung Kim, Gi-Sung Yeo, 2001 .

Era of double exposure in 70 nm node DRAM cell

Gi-Sung Yeo, Han-Ku Cho, Joo-Tae Moon, 2004, SPIE Advanced Lithography.

CD control for quarter-micron logic device gates using iso-pitch bias

Gi-Sung Yeo, U-In Chung, Young-Chang Kim, 1998, Advanced Lithography.

Adaptability and validity of thin organic bottom anti-reflective coating (BARC) to sub-90-nm patterning in ArF lithography

Gi-Sung Yeo, Han-Ku Cho, Joo-Tae Moon, 2003, SPIE Advanced Lithography.

Lithography process design for 4-Gb DRAM of 0.31 K1 with KrF

Jung-hyun Lee, Byeong-soo Kim, Insung Kim, 2001, SPIE Advanced Lithography.

Automatic in-situ focus monitor using line-shortening effect

Gi-Sung Yeo, U-In Chung, Young-Chang Kim, 1999, Advanced Lithography.

One step forward to maturity of AF (assistant feature)-OPC in 100-nm level DRAM application

Jung-hyun Lee, Byeong-soo Kim, Insung Kim, 2002, SPIE Photomask Technology.

Realization of sub-80-nm small-space patterning in ArF photolithography

Gi-Sung Yeo, Jung-Hyeon Lee, Han-Ku Cho, 2004, SPIE Advanced Lithography.

Statistical analysis of CD-SEM measurement and process control in the indistinguishable multiprocess patterns

Gi-Sung Yeo, Han-Ku Cho, Joo-Tae Moon, 2006, SPIE Advanced Lithography.

Improving model-based OPC performance for sub-60nm devices using real source optical model

Insung Kim, Gi-Sung Yeo, Han-Ku Cho, 2006, SPIE Advanced Lithography.

Fulfillment of model-based OPC for contact patterns in 60-nm level logic device

Gi-Sung Yeo, Jung-Hyeon Lee, Han-Ku Cho, 2004, SPIE Advanced Lithography.

Challenge for effective OCV control in 90-nm logic gate using ArF lithography

Gi-Sung Yeo, Jung-Hyeon Lee, Han-Ku Cho, 2003, SPIE Advanced Lithography.

An array cell transistor test structure for the leakage current analysis of stacked capacitor DRAMs with diagonal cell scheme

Gi-Sung Yeo, Young Pil Kim, Beom Jun Jin, 2004, Proceedings of the 2004 International Conference on Microelectronic Test Structures (IEEE Cat. No.04CH37516).

Attainable road to the lower-k1 extension using high-transmittance attenuated phase-shifting mask in the KrF lithography world

Jung-hyun Lee, Insung Kim, Gi-Sung Yeo, 2002, SPIE Advanced Lithography.

Flare-induced CD variation correction using transmittance controlled mask

Gi-Sung Yeo, Han-Ku Cho, Woo-Sung Han, 2003, SPIE Advanced Lithography.

Investigation of stray light characteristic by multiple Gaussian modeling and its OPC application

Gi-Sung Yeo, Han-Ku Cho, Woo-Sung Han, 2004, SPIE Advanced Lithography.

Improvement of shot uniformity on a wafer by controlling backside transmittance distribution of a photomask

Gi-Sung Yeo, Jung-Min Sohn, Sung-Woon Choi, 2003, SPIE Advanced Lithography.

Emergence of assist feature OPC era in sub-130-nm DRAM devices

Byeong-soo Kim, Insung Kim, Gi-Sung Yeo, 2001, SPIE Photomask Technology.